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PCI: delay configuration of SRIOV capability
The SRIOV capability, namely page size and total_vfs of a device are configured during enumeration phase of the device. This can potentially interfere with the PCI operations of the platform, if the IOV capability of the device is not enabled. The following patch postpones the configuration of the IOV capability of the device to a later point, when the IOV capability is explicitly enabled by the device driver. The patch is tested on x86 and power platform. Tested-by: Donald Dutile <ddutile@redhat.com> Signed-off-by: Ram Pai <linuxram@us.ibm.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
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79cc9601c3
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1 changed files with 2 additions and 2 deletions
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@ -347,6 +347,8 @@ static int sriov_enable(struct pci_dev *dev, int nr_virtfn)
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return rc;
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return rc;
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}
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}
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pci_write_config_dword(dev, iov->pos + PCI_SRIOV_SYS_PGSIZE, iov->pgsz);
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iov->ctrl |= PCI_SRIOV_CTRL_VFE | PCI_SRIOV_CTRL_MSE;
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iov->ctrl |= PCI_SRIOV_CTRL_VFE | PCI_SRIOV_CTRL_MSE;
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pci_cfg_access_lock(dev);
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pci_cfg_access_lock(dev);
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pci_write_config_word(dev, iov->pos + PCI_SRIOV_CTRL, iov->ctrl);
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pci_write_config_word(dev, iov->pos + PCI_SRIOV_CTRL, iov->ctrl);
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@ -452,7 +454,6 @@ static int sriov_init(struct pci_dev *dev, int pos)
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found:
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found:
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pci_write_config_word(dev, pos + PCI_SRIOV_CTRL, ctrl);
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pci_write_config_word(dev, pos + PCI_SRIOV_CTRL, ctrl);
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pci_write_config_word(dev, pos + PCI_SRIOV_NUM_VF, total);
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pci_read_config_word(dev, pos + PCI_SRIOV_VF_OFFSET, &offset);
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pci_read_config_word(dev, pos + PCI_SRIOV_VF_OFFSET, &offset);
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pci_read_config_word(dev, pos + PCI_SRIOV_VF_STRIDE, &stride);
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pci_read_config_word(dev, pos + PCI_SRIOV_VF_STRIDE, &stride);
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if (!offset || (total > 1 && !stride))
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if (!offset || (total > 1 && !stride))
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@ -465,7 +466,6 @@ static int sriov_init(struct pci_dev *dev, int pos)
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return -EIO;
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return -EIO;
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pgsz &= ~(pgsz - 1);
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pgsz &= ~(pgsz - 1);
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pci_write_config_dword(dev, pos + PCI_SRIOV_SYS_PGSIZE, pgsz);
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nres = 0;
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nres = 0;
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for (i = 0; i < PCI_SRIOV_NUM_BARS; i++) {
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for (i = 0; i < PCI_SRIOV_NUM_BARS; i++) {
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