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ARM: keystone: dts: fix typo in the ddr3 pllclk node name
Fix following typo ddr3allclk -> ddr3apllclk ddr3bllclk -> ddr3bpllclk Signed-off-by: Murali Karicheri <m-karicheri2@ti.com> Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
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b8273f2eb5
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1 changed files with 2 additions and 2 deletions
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@ -31,7 +31,7 @@ papllclk: papllclk@2620358 {
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reg-names = "control";
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reg-names = "control";
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};
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};
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ddr3allclk: ddr3apllclk@2620360 {
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ddr3apllclk: ddr3apllclk@2620360 {
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#clock-cells = <0>;
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#clock-cells = <0>;
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compatible = "ti,keystone,pll-clock";
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compatible = "ti,keystone,pll-clock";
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clocks = <&refclkddr3a>;
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clocks = <&refclkddr3a>;
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@ -40,7 +40,7 @@ ddr3allclk: ddr3apllclk@2620360 {
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reg-names = "control";
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reg-names = "control";
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};
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};
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ddr3bllclk: ddr3bpllclk@2620368 {
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ddr3bpllclk: ddr3bpllclk@2620368 {
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#clock-cells = <0>;
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#clock-cells = <0>;
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compatible = "ti,keystone,pll-clock";
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compatible = "ti,keystone,pll-clock";
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clocks = <&refclkddr3b>;
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clocks = <&refclkddr3b>;
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