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Staging/IIO fixes for 5.5-rc2
Here are a number of small staging and IIO driver fixes for reported issues for 5.5-rc2 Nothing major, a bunch of tiny IIO driver issues resolved, and some staging driver fixes for things that people ran into with 5.5-rc1. Full details are in the shortlog. All of these have been in linux-next with no reported issues. Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> -----BEGIN PGP SIGNATURE----- iG0EABECAC0WIQT0tgzFv3jCIUoxPcsxR9QN2y37KQUCXfT+cg8cZ3JlZ0Brcm9h aC5jb20ACgkQMUfUDdst+ykdqQCdGFa/Gafh4bWklhqQ9o0BSr7xzgMAn2DADxOp Ii2JEMss9lSS158I567k =coTA -----END PGP SIGNATURE----- Merge tag 'staging-5.5-rc2' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/staging Pull staging/IIO fixes from Greg KH: "Here are a number of small staging and IIO driver fixes for reported issues for 5.5-rc2 Nothing major, a bunch of tiny IIO driver issues resolved, and some staging driver fixes for things that people ran into with 5.5-rc1. Full details are in the shortlog. All of these have been in linux-next with no reported issues" * tag 'staging-5.5-rc2' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/staging: (28 commits) fbtft: Fix the initialization from property algorithm staging: rtl8712: fix interface sanity check staging: rtl8188eu: fix interface sanity check staging: gigaset: add endpoint-type sanity check staging: gigaset: fix illegal free on probe errors staging: gigaset: fix general protection fault on probe staging: vchiq: call unregister_chrdev_region() when driver registration fails staging: exfat: fix multiple definition error of `rename_file' staging/wlan-ng: add CRC32 dependency in Kconfig staging: hp100: Fix build error without ETHERNET staging: fbtft: Do not hardcode SPI CS polarity inversion staging: exfat: properly support discard in clr_alloc_bitmap() staging/octeon: Mark Ethernet driver as BROKEN iio: adc: max9611: Fix too short conversion time delay iio: ad7949: fix channels mixups iio: imu: st_lsm6dsx: do not power-off accel if events are enabled iio: imu: st_lsm6dsx: track hw FIFO buffering with fifo_mask iio: imu: st_lsm6dsx: fix decimation factor estimation iio: imu: inv_mpu6050: fix temperature reporting using bad unit iio: humidity: hdc100x: fix IIO_HUMIDITYRELATIVE channel reporting ...
This commit is contained in:
commit
aff2a52507
28 changed files with 200 additions and 92 deletions
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@ -1,4 +1,4 @@
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# SPDX-License-Identifier: GPL-2.0-only
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/iio/adc/adi,ad7292.yaml#
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||||
|
@ -53,7 +53,8 @@ patternProperties:
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|||
description: |
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||||
The channel number. It can have up to 8 channels numbered from 0 to 7.
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items:
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maximum: 7
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- minimum: 0
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maximum: 7
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diff-channels:
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description: see Documentation/devicetree/bindings/iio/adc/adc.txt
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|
|
|
@ -992,6 +992,7 @@ static const struct iio_trigger_ops st_accel_trigger_ops = {
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#define ST_ACCEL_TRIGGER_OPS NULL
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#endif
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#ifdef CONFIG_ACPI
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static const struct iio_mount_matrix *
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get_mount_matrix(const struct iio_dev *indio_dev,
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const struct iio_chan_spec *chan)
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@ -1012,7 +1013,6 @@ static const struct iio_chan_spec_ext_info mount_matrix_ext_info[] = {
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static int apply_acpi_orientation(struct iio_dev *indio_dev,
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struct iio_chan_spec *channels)
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{
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#ifdef CONFIG_ACPI
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struct st_sensor_data *adata = iio_priv(indio_dev);
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struct acpi_buffer buffer = {ACPI_ALLOCATE_BUFFER, NULL};
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struct acpi_device *adev;
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@ -1140,10 +1140,14 @@ static int apply_acpi_orientation(struct iio_dev *indio_dev,
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out:
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kfree(buffer.pointer);
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return ret;
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#else /* !CONFIG_ACPI */
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return 0;
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#endif
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}
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#else /* !CONFIG_ACPI */
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static int apply_acpi_orientation(struct iio_dev *indio_dev,
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struct iio_chan_spec *channels)
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{
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return 0;
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}
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#endif
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/*
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* st_accel_get_settings() - get sensor settings from device name
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|
|
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@ -39,6 +39,8 @@
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#define AD7124_STATUS_POR_FLAG_MSK BIT(4)
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/* AD7124_ADC_CONTROL */
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#define AD7124_ADC_CTRL_REF_EN_MSK BIT(8)
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#define AD7124_ADC_CTRL_REF_EN(x) FIELD_PREP(AD7124_ADC_CTRL_REF_EN_MSK, x)
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#define AD7124_ADC_CTRL_PWR_MSK GENMASK(7, 6)
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#define AD7124_ADC_CTRL_PWR(x) FIELD_PREP(AD7124_ADC_CTRL_PWR_MSK, x)
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#define AD7124_ADC_CTRL_MODE_MSK GENMASK(5, 2)
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@ -424,7 +426,10 @@ static int ad7124_init_channel_vref(struct ad7124_state *st,
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break;
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case AD7124_INT_REF:
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st->channel_config[channel_number].vref_mv = 2500;
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break;
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st->adc_control &= ~AD7124_ADC_CTRL_REF_EN_MSK;
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st->adc_control |= AD7124_ADC_CTRL_REF_EN(1);
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return ad_sd_write_reg(&st->sd, AD7124_ADC_CONTROL,
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2, st->adc_control);
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default:
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dev_err(&st->sd.spi->dev, "Invalid reference %d\n", refsel);
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return -EINVAL;
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|
|
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@ -85,7 +85,7 @@ static int ad7606_reg_access(struct iio_dev *indio_dev,
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static int ad7606_read_samples(struct ad7606_state *st)
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{
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unsigned int num = st->chip_info->num_channels;
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unsigned int num = st->chip_info->num_channels - 1;
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u16 *data = st->data;
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int ret;
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|
|
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@ -89,6 +89,7 @@ static int ad7949_spi_read_channel(struct ad7949_adc_chip *ad7949_adc, int *val,
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unsigned int channel)
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{
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int ret;
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int i;
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int bits_per_word = ad7949_adc->resolution;
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int mask = GENMASK(ad7949_adc->resolution, 0);
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struct spi_message msg;
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|
@ -100,12 +101,23 @@ static int ad7949_spi_read_channel(struct ad7949_adc_chip *ad7949_adc, int *val,
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},
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};
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ret = ad7949_spi_write_cfg(ad7949_adc,
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channel << AD7949_OFFSET_CHANNEL_SEL,
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AD7949_MASK_CHANNEL_SEL);
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if (ret)
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return ret;
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/*
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* 1: write CFG for sample N and read old data (sample N-2)
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* 2: if CFG was not changed since sample N-1 then we'll get good data
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* at the next xfer, so we bail out now, otherwise we write something
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* and we read garbage (sample N-1 configuration).
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*/
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for (i = 0; i < 2; i++) {
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ret = ad7949_spi_write_cfg(ad7949_adc,
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channel << AD7949_OFFSET_CHANNEL_SEL,
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AD7949_MASK_CHANNEL_SEL);
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if (ret)
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return ret;
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if (channel == ad7949_adc->current_channel)
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break;
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}
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/* 3: write something and read actual data */
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ad7949_adc->buffer = 0;
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spi_message_init_with_transfers(&msg, tx, 1);
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ret = spi_sync(ad7949_adc->spi, &msg);
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|
|
|
@ -185,7 +185,7 @@ static int mrfld_adc_probe(struct platform_device *pdev)
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int irq;
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int ret;
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indio_dev = devm_iio_device_alloc(dev, sizeof(*indio_dev));
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indio_dev = devm_iio_device_alloc(dev, sizeof(struct mrfld_adc));
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if (!indio_dev)
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return -ENOMEM;
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|
|
|
@ -478,7 +478,13 @@ static int max1027_probe(struct spi_device *spi)
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st->trig->ops = &max1027_trigger_ops;
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st->trig->dev.parent = &spi->dev;
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iio_trigger_set_drvdata(st->trig, indio_dev);
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iio_trigger_register(st->trig);
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ret = devm_iio_trigger_register(&indio_dev->dev,
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st->trig);
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if (ret < 0) {
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dev_err(&indio_dev->dev,
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"Failed to register iio trigger\n");
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return ret;
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}
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ret = devm_request_threaded_irq(&spi->dev, spi->irq,
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iio_trigger_generic_data_rdy_poll,
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|
|
|
@ -89,6 +89,12 @@
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#define MAX9611_TEMP_SCALE_NUM 1000000
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#define MAX9611_TEMP_SCALE_DIV 2083
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/*
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* Conversion time is 2 ms (typically) at Ta=25 degreeC
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* No maximum value is known, so play it safe.
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*/
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#define MAX9611_CONV_TIME_US_RANGE 3000, 3300
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struct max9611_dev {
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struct device *dev;
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struct i2c_client *i2c_client;
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@ -236,11 +242,9 @@ static int max9611_read_single(struct max9611_dev *max9611,
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return ret;
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}
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/*
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* need a delay here to make register configuration
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* stabilize. 1 msec at least, from empirical testing.
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*/
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usleep_range(1000, 2000);
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/* need a delay here to make register configuration stabilize. */
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usleep_range(MAX9611_CONV_TIME_US_RANGE);
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ret = i2c_smbus_read_word_swapped(max9611->i2c_client, reg_addr);
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if (ret < 0) {
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@ -507,7 +511,7 @@ static int max9611_init(struct max9611_dev *max9611)
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MAX9611_REG_CTRL2, 0);
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return ret;
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}
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usleep_range(1000, 2000);
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usleep_range(MAX9611_CONV_TIME_US_RANGE);
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return 0;
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}
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|
|
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@ -229,7 +229,7 @@ static int hdc100x_read_raw(struct iio_dev *indio_dev,
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*val2 = 65536;
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return IIO_VAL_FRACTIONAL;
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} else {
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*val = 100;
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*val = 100000;
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*val2 = 65536;
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return IIO_VAL_FRACTIONAL;
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}
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|
|
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@ -117,6 +117,7 @@ static const struct inv_mpu6050_hw hw_info[] = {
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.reg = ®_set_6050,
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.config = &chip_config_6050,
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.fifo_size = 1024,
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.temp = {INV_MPU6050_TEMP_OFFSET, INV_MPU6050_TEMP_SCALE},
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},
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{
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.whoami = INV_MPU6500_WHOAMI_VALUE,
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@ -124,6 +125,7 @@ static const struct inv_mpu6050_hw hw_info[] = {
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.reg = ®_set_6500,
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.config = &chip_config_6050,
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.fifo_size = 512,
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.temp = {INV_MPU6500_TEMP_OFFSET, INV_MPU6500_TEMP_SCALE},
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},
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{
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.whoami = INV_MPU6515_WHOAMI_VALUE,
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@ -131,6 +133,7 @@ static const struct inv_mpu6050_hw hw_info[] = {
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.reg = ®_set_6500,
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.config = &chip_config_6050,
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.fifo_size = 512,
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.temp = {INV_MPU6500_TEMP_OFFSET, INV_MPU6500_TEMP_SCALE},
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},
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{
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.whoami = INV_MPU6000_WHOAMI_VALUE,
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@ -138,6 +141,7 @@ static const struct inv_mpu6050_hw hw_info[] = {
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.reg = ®_set_6050,
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.config = &chip_config_6050,
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.fifo_size = 1024,
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.temp = {INV_MPU6050_TEMP_OFFSET, INV_MPU6050_TEMP_SCALE},
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},
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{
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.whoami = INV_MPU9150_WHOAMI_VALUE,
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@ -145,6 +149,7 @@ static const struct inv_mpu6050_hw hw_info[] = {
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.reg = ®_set_6050,
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.config = &chip_config_6050,
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.fifo_size = 1024,
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.temp = {INV_MPU6050_TEMP_OFFSET, INV_MPU6050_TEMP_SCALE},
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},
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{
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.whoami = INV_MPU9250_WHOAMI_VALUE,
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@ -152,6 +157,7 @@ static const struct inv_mpu6050_hw hw_info[] = {
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.reg = ®_set_6500,
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.config = &chip_config_6050,
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.fifo_size = 512,
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.temp = {INV_MPU6500_TEMP_OFFSET, INV_MPU6500_TEMP_SCALE},
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},
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{
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.whoami = INV_MPU9255_WHOAMI_VALUE,
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|
@ -159,6 +165,7 @@ static const struct inv_mpu6050_hw hw_info[] = {
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.reg = ®_set_6500,
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.config = &chip_config_6050,
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.fifo_size = 512,
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.temp = {INV_MPU6500_TEMP_OFFSET, INV_MPU6500_TEMP_SCALE},
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},
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{
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.whoami = INV_ICM20608_WHOAMI_VALUE,
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|
@ -166,6 +173,7 @@ static const struct inv_mpu6050_hw hw_info[] = {
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.reg = ®_set_6500,
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.config = &chip_config_6050,
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.fifo_size = 512,
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.temp = {INV_ICM20608_TEMP_OFFSET, INV_ICM20608_TEMP_SCALE},
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},
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{
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.whoami = INV_ICM20602_WHOAMI_VALUE,
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|
@ -173,6 +181,7 @@ static const struct inv_mpu6050_hw hw_info[] = {
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.reg = ®_set_icm20602,
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.config = &chip_config_6050,
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.fifo_size = 1008,
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.temp = {INV_ICM20608_TEMP_OFFSET, INV_ICM20608_TEMP_SCALE},
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},
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};
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|
@ -481,12 +490,8 @@ inv_mpu6050_read_raw(struct iio_dev *indio_dev,
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|
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return IIO_VAL_INT_PLUS_MICRO;
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case IIO_TEMP:
|
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*val = 0;
|
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if (st->chip_type == INV_ICM20602)
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*val2 = INV_ICM20602_TEMP_SCALE;
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else
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*val2 = INV_MPU6050_TEMP_SCALE;
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|
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*val = st->hw->temp.scale / 1000000;
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*val2 = st->hw->temp.scale % 1000000;
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return IIO_VAL_INT_PLUS_MICRO;
|
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case IIO_MAGN:
|
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return inv_mpu_magn_get_scale(st, chan, val, val2);
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|
@ -496,11 +501,7 @@ inv_mpu6050_read_raw(struct iio_dev *indio_dev,
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case IIO_CHAN_INFO_OFFSET:
|
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switch (chan->type) {
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case IIO_TEMP:
|
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if (st->chip_type == INV_ICM20602)
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*val = INV_ICM20602_TEMP_OFFSET;
|
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else
|
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*val = INV_MPU6050_TEMP_OFFSET;
|
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|
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*val = st->hw->temp.offset;
|
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return IIO_VAL_INT;
|
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default:
|
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return -EINVAL;
|
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|
|
|
@ -107,6 +107,7 @@ struct inv_mpu6050_chip_config {
|
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* @reg: register map of the chip.
|
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* @config: configuration of the chip.
|
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* @fifo_size: size of the FIFO in bytes.
|
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* @temp: offset and scale to apply to raw temperature.
|
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*/
|
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struct inv_mpu6050_hw {
|
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u8 whoami;
|
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|
@ -114,6 +115,10 @@ struct inv_mpu6050_hw {
|
|||
const struct inv_mpu6050_reg_map *reg;
|
||||
const struct inv_mpu6050_chip_config *config;
|
||||
size_t fifo_size;
|
||||
struct {
|
||||
int offset;
|
||||
int scale;
|
||||
} temp;
|
||||
};
|
||||
|
||||
/*
|
||||
|
@ -279,16 +284,19 @@ struct inv_mpu6050_state {
|
|||
#define INV_MPU6050_REG_UP_TIME_MIN 5000
|
||||
#define INV_MPU6050_REG_UP_TIME_MAX 10000
|
||||
|
||||
#define INV_MPU6050_TEMP_OFFSET 12421
|
||||
#define INV_MPU6050_TEMP_SCALE 2941
|
||||
#define INV_MPU6050_TEMP_OFFSET 12420
|
||||
#define INV_MPU6050_TEMP_SCALE 2941176
|
||||
#define INV_MPU6050_MAX_GYRO_FS_PARAM 3
|
||||
#define INV_MPU6050_MAX_ACCL_FS_PARAM 3
|
||||
#define INV_MPU6050_THREE_AXIS 3
|
||||
#define INV_MPU6050_GYRO_CONFIG_FSR_SHIFT 3
|
||||
#define INV_MPU6050_ACCL_CONFIG_FSR_SHIFT 3
|
||||
|
||||
#define INV_ICM20602_TEMP_OFFSET 8170
|
||||
#define INV_ICM20602_TEMP_SCALE 3060
|
||||
#define INV_MPU6500_TEMP_OFFSET 7011
|
||||
#define INV_MPU6500_TEMP_SCALE 2995178
|
||||
|
||||
#define INV_ICM20608_TEMP_OFFSET 8170
|
||||
#define INV_ICM20608_TEMP_SCALE 3059976
|
||||
|
||||
/* 6 + 6 + 7 (for MPU9x50) = 19 round up to 24 and plus 8 */
|
||||
#define INV_MPU6050_OUTPUT_DATA_SIZE 32
|
||||
|
|
|
@ -320,7 +320,6 @@ enum st_lsm6dsx_fifo_mode {
|
|||
* @odr: Output data rate of the sensor [Hz].
|
||||
* @watermark: Sensor watermark level.
|
||||
* @sip: Number of samples in a given pattern.
|
||||
* @decimator: FIFO decimation factor.
|
||||
* @ts_ref: Sensor timestamp reference for hw one.
|
||||
* @ext_info: Sensor settings if it is connected to i2c controller
|
||||
*/
|
||||
|
@ -334,7 +333,6 @@ struct st_lsm6dsx_sensor {
|
|||
|
||||
u16 watermark;
|
||||
u8 sip;
|
||||
u8 decimator;
|
||||
s64 ts_ref;
|
||||
|
||||
struct {
|
||||
|
@ -351,9 +349,9 @@ struct st_lsm6dsx_sensor {
|
|||
* @fifo_lock: Mutex to prevent concurrent access to the hw FIFO.
|
||||
* @conf_lock: Mutex to prevent concurrent FIFO configuration update.
|
||||
* @page_lock: Mutex to prevent concurrent memory page configuration.
|
||||
* @fifo_mode: FIFO operating mode supported by the device.
|
||||
* @suspend_mask: Suspended sensor bitmask.
|
||||
* @enable_mask: Enabled sensor bitmask.
|
||||
* @fifo_mask: Enabled hw FIFO bitmask.
|
||||
* @ts_gain: Hw timestamp rate after internal calibration.
|
||||
* @ts_sip: Total number of timestamp samples in a given pattern.
|
||||
* @sip: Total number of samples (acc/gyro/ts) in a given pattern.
|
||||
|
@ -373,9 +371,9 @@ struct st_lsm6dsx_hw {
|
|||
struct mutex conf_lock;
|
||||
struct mutex page_lock;
|
||||
|
||||
enum st_lsm6dsx_fifo_mode fifo_mode;
|
||||
u8 suspend_mask;
|
||||
u8 enable_mask;
|
||||
u8 fifo_mask;
|
||||
s64 ts_gain;
|
||||
u8 ts_sip;
|
||||
u8 sip;
|
||||
|
|
|
@ -78,14 +78,20 @@ struct st_lsm6dsx_decimator_entry st_lsm6dsx_decimator_table[] = {
|
|||
{ 32, 0x7 },
|
||||
};
|
||||
|
||||
static int st_lsm6dsx_get_decimator_val(u8 val)
|
||||
static int
|
||||
st_lsm6dsx_get_decimator_val(struct st_lsm6dsx_sensor *sensor, u32 max_odr)
|
||||
{
|
||||
const int max_size = ARRAY_SIZE(st_lsm6dsx_decimator_table);
|
||||
u32 decimator = max_odr / sensor->odr;
|
||||
int i;
|
||||
|
||||
for (i = 0; i < max_size; i++)
|
||||
if (st_lsm6dsx_decimator_table[i].decimator == val)
|
||||
if (decimator > 1)
|
||||
decimator = round_down(decimator, 2);
|
||||
|
||||
for (i = 0; i < max_size; i++) {
|
||||
if (st_lsm6dsx_decimator_table[i].decimator == decimator)
|
||||
break;
|
||||
}
|
||||
|
||||
return i == max_size ? 0 : st_lsm6dsx_decimator_table[i].val;
|
||||
}
|
||||
|
@ -111,6 +117,13 @@ static void st_lsm6dsx_get_max_min_odr(struct st_lsm6dsx_hw *hw,
|
|||
}
|
||||
}
|
||||
|
||||
static u8 st_lsm6dsx_get_sip(struct st_lsm6dsx_sensor *sensor, u32 min_odr)
|
||||
{
|
||||
u8 sip = sensor->odr / min_odr;
|
||||
|
||||
return sip > 1 ? round_down(sip, 2) : sip;
|
||||
}
|
||||
|
||||
static int st_lsm6dsx_update_decimators(struct st_lsm6dsx_hw *hw)
|
||||
{
|
||||
const struct st_lsm6dsx_reg *ts_dec_reg;
|
||||
|
@ -131,12 +144,10 @@ static int st_lsm6dsx_update_decimators(struct st_lsm6dsx_hw *hw)
|
|||
sensor = iio_priv(hw->iio_devs[i]);
|
||||
/* update fifo decimators and sample in pattern */
|
||||
if (hw->enable_mask & BIT(sensor->id)) {
|
||||
sensor->sip = sensor->odr / min_odr;
|
||||
sensor->decimator = max_odr / sensor->odr;
|
||||
data = st_lsm6dsx_get_decimator_val(sensor->decimator);
|
||||
sensor->sip = st_lsm6dsx_get_sip(sensor, min_odr);
|
||||
data = st_lsm6dsx_get_decimator_val(sensor, max_odr);
|
||||
} else {
|
||||
sensor->sip = 0;
|
||||
sensor->decimator = 0;
|
||||
data = 0;
|
||||
}
|
||||
ts_sip = max_t(u16, ts_sip, sensor->sip);
|
||||
|
@ -176,17 +187,10 @@ int st_lsm6dsx_set_fifo_mode(struct st_lsm6dsx_hw *hw,
|
|||
enum st_lsm6dsx_fifo_mode fifo_mode)
|
||||
{
|
||||
unsigned int data;
|
||||
int err;
|
||||
|
||||
data = FIELD_PREP(ST_LSM6DSX_FIFO_MODE_MASK, fifo_mode);
|
||||
err = st_lsm6dsx_update_bits_locked(hw, ST_LSM6DSX_REG_FIFO_MODE_ADDR,
|
||||
ST_LSM6DSX_FIFO_MODE_MASK, data);
|
||||
if (err < 0)
|
||||
return err;
|
||||
|
||||
hw->fifo_mode = fifo_mode;
|
||||
|
||||
return 0;
|
||||
return st_lsm6dsx_update_bits_locked(hw, ST_LSM6DSX_REG_FIFO_MODE_ADDR,
|
||||
ST_LSM6DSX_FIFO_MODE_MASK, data);
|
||||
}
|
||||
|
||||
static int st_lsm6dsx_set_fifo_odr(struct st_lsm6dsx_sensor *sensor,
|
||||
|
@ -608,11 +612,17 @@ int st_lsm6dsx_flush_fifo(struct st_lsm6dsx_hw *hw)
|
|||
int st_lsm6dsx_update_fifo(struct st_lsm6dsx_sensor *sensor, bool enable)
|
||||
{
|
||||
struct st_lsm6dsx_hw *hw = sensor->hw;
|
||||
u8 fifo_mask;
|
||||
int err;
|
||||
|
||||
mutex_lock(&hw->conf_lock);
|
||||
|
||||
if (hw->fifo_mode != ST_LSM6DSX_FIFO_BYPASS) {
|
||||
if (enable)
|
||||
fifo_mask = hw->fifo_mask | BIT(sensor->id);
|
||||
else
|
||||
fifo_mask = hw->fifo_mask & ~BIT(sensor->id);
|
||||
|
||||
if (hw->fifo_mask) {
|
||||
err = st_lsm6dsx_flush_fifo(hw);
|
||||
if (err < 0)
|
||||
goto out;
|
||||
|
@ -642,15 +652,19 @@ int st_lsm6dsx_update_fifo(struct st_lsm6dsx_sensor *sensor, bool enable)
|
|||
if (err < 0)
|
||||
goto out;
|
||||
|
||||
if (hw->enable_mask) {
|
||||
if (fifo_mask) {
|
||||
/* reset hw ts counter */
|
||||
err = st_lsm6dsx_reset_hw_ts(hw);
|
||||
if (err < 0)
|
||||
goto out;
|
||||
|
||||
err = st_lsm6dsx_set_fifo_mode(hw, ST_LSM6DSX_FIFO_CONT);
|
||||
if (err < 0)
|
||||
goto out;
|
||||
}
|
||||
|
||||
hw->fifo_mask = fifo_mask;
|
||||
|
||||
out:
|
||||
mutex_unlock(&hw->conf_lock);
|
||||
|
||||
|
|
|
@ -1447,8 +1447,9 @@ st_lsm6dsx_set_odr(struct st_lsm6dsx_sensor *sensor, u32 req_odr)
|
|||
return st_lsm6dsx_update_bits_locked(hw, reg->addr, reg->mask, data);
|
||||
}
|
||||
|
||||
int st_lsm6dsx_sensor_set_enable(struct st_lsm6dsx_sensor *sensor,
|
||||
bool enable)
|
||||
static int
|
||||
__st_lsm6dsx_sensor_set_enable(struct st_lsm6dsx_sensor *sensor,
|
||||
bool enable)
|
||||
{
|
||||
struct st_lsm6dsx_hw *hw = sensor->hw;
|
||||
u32 odr = enable ? sensor->odr : 0;
|
||||
|
@ -1466,6 +1467,26 @@ int st_lsm6dsx_sensor_set_enable(struct st_lsm6dsx_sensor *sensor,
|
|||
return 0;
|
||||
}
|
||||
|
||||
static int
|
||||
st_lsm6dsx_check_events(struct st_lsm6dsx_sensor *sensor, bool enable)
|
||||
{
|
||||
struct st_lsm6dsx_hw *hw = sensor->hw;
|
||||
|
||||
if (sensor->id == ST_LSM6DSX_ID_GYRO || enable)
|
||||
return 0;
|
||||
|
||||
return hw->enable_event;
|
||||
}
|
||||
|
||||
int st_lsm6dsx_sensor_set_enable(struct st_lsm6dsx_sensor *sensor,
|
||||
bool enable)
|
||||
{
|
||||
if (st_lsm6dsx_check_events(sensor, enable))
|
||||
return 0;
|
||||
|
||||
return __st_lsm6dsx_sensor_set_enable(sensor, enable);
|
||||
}
|
||||
|
||||
static int st_lsm6dsx_read_oneshot(struct st_lsm6dsx_sensor *sensor,
|
||||
u8 addr, int *val)
|
||||
{
|
||||
|
@ -1661,7 +1682,7 @@ st_lsm6dsx_write_event_config(struct iio_dev *iio_dev,
|
|||
struct st_lsm6dsx_sensor *sensor = iio_priv(iio_dev);
|
||||
struct st_lsm6dsx_hw *hw = sensor->hw;
|
||||
u8 enable_event;
|
||||
int err = 0;
|
||||
int err;
|
||||
|
||||
if (type != IIO_EV_TYPE_THRESH)
|
||||
return -EINVAL;
|
||||
|
@ -1689,7 +1710,8 @@ st_lsm6dsx_write_event_config(struct iio_dev *iio_dev,
|
|||
return err;
|
||||
|
||||
mutex_lock(&hw->conf_lock);
|
||||
err = st_lsm6dsx_sensor_set_enable(sensor, state);
|
||||
if (enable_event || !(hw->fifo_mask & BIT(sensor->id)))
|
||||
err = __st_lsm6dsx_sensor_set_enable(sensor, state);
|
||||
mutex_unlock(&hw->conf_lock);
|
||||
if (err < 0)
|
||||
return err;
|
||||
|
@ -2300,7 +2322,7 @@ static int __maybe_unused st_lsm6dsx_suspend(struct device *dev)
|
|||
hw->suspend_mask |= BIT(sensor->id);
|
||||
}
|
||||
|
||||
if (hw->fifo_mode != ST_LSM6DSX_FIFO_BYPASS)
|
||||
if (hw->fifo_mask)
|
||||
err = st_lsm6dsx_flush_fifo(hw);
|
||||
|
||||
return err;
|
||||
|
@ -2336,7 +2358,7 @@ static int __maybe_unused st_lsm6dsx_resume(struct device *dev)
|
|||
hw->suspend_mask &= ~BIT(sensor->id);
|
||||
}
|
||||
|
||||
if (hw->enable_mask)
|
||||
if (hw->fifo_mask)
|
||||
err = st_lsm6dsx_set_fifo_mode(hw, ST_LSM6DSX_FIFO_CONT);
|
||||
|
||||
return err;
|
||||
|
|
|
@ -444,8 +444,10 @@ static struct ltc2983_custom_sensor *__ltc2983_custom_sensor_new(
|
|||
else
|
||||
temp = __convert_to_raw(temp, resolution);
|
||||
} else {
|
||||
of_property_read_u32_index(np, propname, index,
|
||||
(u32 *)&temp);
|
||||
u32 t32;
|
||||
|
||||
of_property_read_u32_index(np, propname, index, &t32);
|
||||
temp = t32;
|
||||
}
|
||||
|
||||
for (j = 0; j < n_size; j++)
|
||||
|
|
|
@ -805,8 +805,8 @@ s32 create_dir(struct inode *inode, struct chain_t *p_dir,
|
|||
s32 create_file(struct inode *inode, struct chain_t *p_dir,
|
||||
struct uni_name_t *p_uniname, u8 mode, struct file_id_t *fid);
|
||||
void remove_file(struct inode *inode, struct chain_t *p_dir, s32 entry);
|
||||
s32 rename_file(struct inode *inode, struct chain_t *p_dir, s32 old_entry,
|
||||
struct uni_name_t *p_uniname, struct file_id_t *fid);
|
||||
s32 exfat_rename_file(struct inode *inode, struct chain_t *p_dir, s32 old_entry,
|
||||
struct uni_name_t *p_uniname, struct file_id_t *fid);
|
||||
s32 move_file(struct inode *inode, struct chain_t *p_olddir, s32 oldentry,
|
||||
struct chain_t *p_newdir, struct uni_name_t *p_uniname,
|
||||
struct file_id_t *fid);
|
||||
|
|
|
@ -192,8 +192,6 @@ static s32 clr_alloc_bitmap(struct super_block *sb, u32 clu)
|
|||
|
||||
exfat_bitmap_clear((u8 *)p_fs->vol_amap[i]->b_data, b);
|
||||
|
||||
return sector_write(sb, sector, p_fs->vol_amap[i], 0);
|
||||
|
||||
#ifdef CONFIG_EXFAT_DISCARD
|
||||
if (opts->discard) {
|
||||
ret = sb_issue_discard(sb, START_SECTOR(clu),
|
||||
|
@ -202,9 +200,13 @@ static s32 clr_alloc_bitmap(struct super_block *sb, u32 clu)
|
|||
if (ret == -EOPNOTSUPP) {
|
||||
pr_warn("discard not supported by device, disabling");
|
||||
opts->discard = 0;
|
||||
} else {
|
||||
return ret;
|
||||
}
|
||||
}
|
||||
#endif /* CONFIG_EXFAT_DISCARD */
|
||||
|
||||
return sector_write(sb, sector, p_fs->vol_amap[i], 0);
|
||||
}
|
||||
|
||||
static u32 test_alloc_bitmap(struct super_block *sb, u32 clu)
|
||||
|
@ -2322,8 +2324,8 @@ void remove_file(struct inode *inode, struct chain_t *p_dir, s32 entry)
|
|||
fs_func->delete_dir_entry(sb, p_dir, entry, 0, num_entries);
|
||||
}
|
||||
|
||||
s32 rename_file(struct inode *inode, struct chain_t *p_dir, s32 oldentry,
|
||||
struct uni_name_t *p_uniname, struct file_id_t *fid)
|
||||
s32 exfat_rename_file(struct inode *inode, struct chain_t *p_dir, s32 oldentry,
|
||||
struct uni_name_t *p_uniname, struct file_id_t *fid)
|
||||
{
|
||||
s32 ret, newentry = -1, num_old_entries, num_new_entries;
|
||||
sector_t sector_old, sector_new;
|
||||
|
|
|
@ -1262,8 +1262,8 @@ static int ffsMoveFile(struct inode *old_parent_inode, struct file_id_t *fid,
|
|||
fs_set_vol_flags(sb, VOL_DIRTY);
|
||||
|
||||
if (olddir.dir == newdir.dir)
|
||||
ret = rename_file(new_parent_inode, &olddir, dentry, &uni_name,
|
||||
fid);
|
||||
ret = exfat_rename_file(new_parent_inode, &olddir, dentry,
|
||||
&uni_name, fid);
|
||||
else
|
||||
ret = move_file(new_parent_inode, &olddir, dentry, &newdir,
|
||||
&uni_name, fid);
|
||||
|
|
|
@ -63,11 +63,17 @@ static int init_display(struct fbtft_par *par)
|
|||
{
|
||||
int ret;
|
||||
|
||||
/* Set CS active high */
|
||||
par->spi->mode |= SPI_CS_HIGH;
|
||||
/*
|
||||
* Set CS active inverse polarity: just setting SPI_CS_HIGH does not
|
||||
* work with GPIO based chip selects that are logically active high
|
||||
* but inverted inside the GPIO library, so enforce inverted
|
||||
* semantics.
|
||||
*/
|
||||
par->spi->mode ^= SPI_CS_HIGH;
|
||||
ret = spi_setup(par->spi);
|
||||
if (ret) {
|
||||
dev_err(par->info->device, "Could not set SPI_CS_HIGH\n");
|
||||
dev_err(par->info->device,
|
||||
"Could not set inverse CS polarity\n");
|
||||
return ret;
|
||||
}
|
||||
|
||||
|
|
|
@ -150,10 +150,17 @@ static int init_display(struct fbtft_par *par)
|
|||
|
||||
/* enable SPI interface by having CS and MOSI low during reset */
|
||||
save_mode = par->spi->mode;
|
||||
par->spi->mode |= SPI_CS_HIGH;
|
||||
ret = spi_setup(par->spi); /* set CS inactive low */
|
||||
/*
|
||||
* Set CS active inverse polarity: just setting SPI_CS_HIGH does not
|
||||
* work with GPIO based chip selects that are logically active high
|
||||
* but inverted inside the GPIO library, so enforce inverted
|
||||
* semantics.
|
||||
*/
|
||||
par->spi->mode ^= SPI_CS_HIGH;
|
||||
ret = spi_setup(par->spi);
|
||||
if (ret) {
|
||||
dev_err(par->info->device, "Could not set SPI_CS_HIGH\n");
|
||||
dev_err(par->info->device,
|
||||
"Could not set inverse CS polarity\n");
|
||||
return ret;
|
||||
}
|
||||
write_reg(par, 0x00); /* make sure mode is set */
|
||||
|
|
|
@ -913,7 +913,7 @@ static int fbtft_init_display_from_property(struct fbtft_par *par)
|
|||
if (count == 0)
|
||||
return -EINVAL;
|
||||
|
||||
values = kmalloc_array(count, sizeof(*values), GFP_KERNEL);
|
||||
values = kmalloc_array(count + 1, sizeof(*values), GFP_KERNEL);
|
||||
if (!values)
|
||||
return -ENOMEM;
|
||||
|
||||
|
@ -926,9 +926,9 @@ static int fbtft_init_display_from_property(struct fbtft_par *par)
|
|||
gpiod_set_value(par->gpio.cs, 0); /* Activate chip */
|
||||
|
||||
index = -1;
|
||||
while (index < count) {
|
||||
val = values[++index];
|
||||
val = values[++index];
|
||||
|
||||
while (index < count) {
|
||||
if (val & FBTFT_OF_INIT_CMD) {
|
||||
val &= 0xFFFF;
|
||||
i = 0;
|
||||
|
|
|
@ -6,6 +6,7 @@
|
|||
config NET_VENDOR_HP
|
||||
bool "HP devices"
|
||||
default y
|
||||
depends on ETHERNET
|
||||
depends on ISA || EISA || PCI
|
||||
---help---
|
||||
If you have a network (Ethernet) card belonging to this class, say Y.
|
||||
|
|
|
@ -571,8 +571,7 @@ static int gigaset_initcshw(struct cardstate *cs)
|
|||
{
|
||||
struct usb_cardstate *ucs;
|
||||
|
||||
cs->hw.usb = ucs =
|
||||
kmalloc(sizeof(struct usb_cardstate), GFP_KERNEL);
|
||||
cs->hw.usb = ucs = kzalloc(sizeof(struct usb_cardstate), GFP_KERNEL);
|
||||
if (!ucs) {
|
||||
pr_err("out of memory\n");
|
||||
return -ENOMEM;
|
||||
|
@ -584,9 +583,6 @@ static int gigaset_initcshw(struct cardstate *cs)
|
|||
ucs->bchars[3] = 0;
|
||||
ucs->bchars[4] = 0x11;
|
||||
ucs->bchars[5] = 0x13;
|
||||
ucs->bulk_out_buffer = NULL;
|
||||
ucs->bulk_out_urb = NULL;
|
||||
ucs->read_urb = NULL;
|
||||
tasklet_init(&cs->write_tasklet,
|
||||
gigaset_modem_fill, (unsigned long) cs);
|
||||
|
||||
|
@ -685,6 +681,11 @@ static int gigaset_probe(struct usb_interface *interface,
|
|||
return -ENODEV;
|
||||
}
|
||||
|
||||
if (hostif->desc.bNumEndpoints < 2) {
|
||||
dev_err(&interface->dev, "missing endpoints\n");
|
||||
return -ENODEV;
|
||||
}
|
||||
|
||||
dev_info(&udev->dev, "%s: Device matched ... !\n", __func__);
|
||||
|
||||
/* allocate memory for our device state and initialize it */
|
||||
|
@ -704,6 +705,12 @@ static int gigaset_probe(struct usb_interface *interface,
|
|||
|
||||
endpoint = &hostif->endpoint[0].desc;
|
||||
|
||||
if (!usb_endpoint_is_bulk_out(endpoint)) {
|
||||
dev_err(&interface->dev, "missing bulk-out endpoint\n");
|
||||
retval = -ENODEV;
|
||||
goto error;
|
||||
}
|
||||
|
||||
buffer_size = le16_to_cpu(endpoint->wMaxPacketSize);
|
||||
ucs->bulk_out_size = buffer_size;
|
||||
ucs->bulk_out_epnum = usb_endpoint_num(endpoint);
|
||||
|
@ -723,6 +730,12 @@ static int gigaset_probe(struct usb_interface *interface,
|
|||
|
||||
endpoint = &hostif->endpoint[1].desc;
|
||||
|
||||
if (!usb_endpoint_is_int_in(endpoint)) {
|
||||
dev_err(&interface->dev, "missing int-in endpoint\n");
|
||||
retval = -ENODEV;
|
||||
goto error;
|
||||
}
|
||||
|
||||
ucs->busy = 0;
|
||||
|
||||
ucs->read_urb = usb_alloc_urb(0, GFP_KERNEL);
|
||||
|
|
|
@ -3,6 +3,7 @@ config OCTEON_ETHERNET
|
|||
tristate "Cavium Networks Octeon Ethernet support"
|
||||
depends on CAVIUM_OCTEON_SOC || COMPILE_TEST
|
||||
depends on NETDEVICES
|
||||
depends on BROKEN
|
||||
select PHYLIB
|
||||
select MDIO_OCTEON
|
||||
help
|
||||
|
|
|
@ -70,7 +70,7 @@ static struct dvobj_priv *usb_dvobj_init(struct usb_interface *usb_intf)
|
|||
phost_conf = pusbd->actconfig;
|
||||
pconf_desc = &phost_conf->desc;
|
||||
|
||||
phost_iface = &usb_intf->altsetting[0];
|
||||
phost_iface = usb_intf->cur_altsetting;
|
||||
piface_desc = &phost_iface->desc;
|
||||
|
||||
pdvobjpriv->NumInterfaces = pconf_desc->bNumInterfaces;
|
||||
|
|
|
@ -247,7 +247,7 @@ static uint r8712_usb_dvobj_init(struct _adapter *padapter)
|
|||
|
||||
pdvobjpriv->padapter = padapter;
|
||||
padapter->eeprom_address_size = 6;
|
||||
phost_iface = &pintf->altsetting[0];
|
||||
phost_iface = pintf->cur_altsetting;
|
||||
piface_desc = &phost_iface->desc;
|
||||
pdvobjpriv->nr_endpoint = piface_desc->bNumEndpoints;
|
||||
if (pusbd->speed == USB_SPEED_HIGH) {
|
||||
|
|
|
@ -3309,7 +3309,7 @@ static int __init vchiq_driver_init(void)
|
|||
return 0;
|
||||
|
||||
region_unregister:
|
||||
platform_driver_unregister(&vchiq_driver);
|
||||
unregister_chrdev_region(vchiq_devid, 1);
|
||||
|
||||
class_destroy:
|
||||
class_destroy(vchiq_class);
|
||||
|
|
|
@ -4,6 +4,7 @@ config PRISM2_USB
|
|||
depends on WLAN && USB && CFG80211
|
||||
select WIRELESS_EXT
|
||||
select WEXT_PRIV
|
||||
select CRC32
|
||||
help
|
||||
This is the wlan-ng prism 2.5/3 USB driver for a wide range of
|
||||
old USB wireless devices.
|
||||
|
|
Loading…
Reference in a new issue