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dt-bindings: pwm: Convert pwm-mtk-disp.txt to mediatek,pwm-disp.yaml format
Convert pwm-mtk-disp.txt to mediatek,pwm-disp.yaml format as suggested by maintainer. Signed-off-by: Xinlei Lee <xinlei.lee@mediatek.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Reviewed-by: Miles Chen <miles.chen@mediatek.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
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2 changed files with 66 additions and 45 deletions
66
Documentation/devicetree/bindings/pwm/mediatek,pwm-disp.yaml
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66
Documentation/devicetree/bindings/pwm/mediatek,pwm-disp.yaml
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/pwm/mediatek,pwm-disp.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: MediaTek DISP_PWM Controller Device Tree Bindings
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maintainers:
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- Jitao Shi <jitao.shi@mediatek.com>
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- Xinlei Lee <xinlei.lee@mediatek.com>
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allOf:
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- $ref: pwm.yaml#
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properties:
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compatible:
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oneOf:
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- enum:
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- mediatek,mt2701-disp-pwm
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- mediatek,mt6595-disp-pwm
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- mediatek,mt8173-disp-pwm
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- mediatek,mt8183-disp-pwm
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- items:
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- const: mediatek,mt8167-disp-pwm
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- const: mediatek,mt8173-disp-pwm
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reg:
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maxItems: 1
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"#pwm-cells":
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const: 2
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clocks:
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items:
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- description: Main Clock
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- description: Mm Clock
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clock-names:
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items:
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- const: main
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- const: mm
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required:
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- compatible
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- reg
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- "#pwm-cells"
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- clocks
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- clock-names
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additionalProperties: false
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examples:
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- |
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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#include <dt-bindings/clock/mt8173-clk.h>
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#include <dt-bindings/interrupt-controller/irq.h>
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pwm0: pwm@1401e000 {
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compatible = "mediatek,mt8173-disp-pwm";
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reg = <0x1401e000 0x1000>;
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#pwm-cells = <2>;
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clocks = <&mmsys CLK_MM_DISP_PWM026M>,
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<&mmsys CLK_MM_DISP_PWM0MM>;
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clock-names = "main", "mm";
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};
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@ -1,45 +0,0 @@
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MediaTek display PWM controller
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Required properties:
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- compatible: should be "mediatek,<name>-disp-pwm":
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- "mediatek,mt2701-disp-pwm": found on mt2701 SoC.
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- "mediatek,mt6595-disp-pwm": found on mt6595 SoC.
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- "mediatek,mt8167-disp-pwm", "mediatek,mt8173-disp-pwm": found on mt8167 SoC.
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- "mediatek,mt8173-disp-pwm": found on mt8173 SoC.
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- "mediatek,mt8183-disp-pwm": found on mt8183 SoC.$
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- reg: physical base address and length of the controller's registers.
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- #pwm-cells: must be 2. See pwm.yaml in this directory for a description of
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the cell format.
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- clocks: phandle and clock specifier of the PWM reference clock.
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- clock-names: must contain the following:
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- "main": clock used to generate PWM signals.
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- "mm": sync signals from the modules of mmsys.
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- pinctrl-names: Must contain a "default" entry.
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- pinctrl-0: One property must exist for each entry in pinctrl-names.
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See pinctrl/pinctrl-bindings.txt for details of the property values.
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Example:
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pwm0: pwm@1401e000 {
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compatible = "mediatek,mt8173-disp-pwm",
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"mediatek,mt6595-disp-pwm";
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reg = <0 0x1401e000 0 0x1000>;
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#pwm-cells = <2>;
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clocks = <&mmsys CLK_MM_DISP_PWM026M>,
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<&mmsys CLK_MM_DISP_PWM0MM>;
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clock-names = "main", "mm";
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pinctrl-names = "default";
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pinctrl-0 = <&disp_pwm0_pins>;
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};
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backlight_lcd: backlight_lcd {
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compatible = "pwm-backlight";
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pwms = <&pwm0 0 1000000>;
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brightness-levels = <
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0 16 32 48 64 80 96 112
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128 144 160 176 192 208 224 240
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255
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>;
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default-brightness-level = <9>;
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power-supply = <&mt6397_vio18_reg>;
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enable-gpios = <&pio 95 GPIO_ACTIVE_HIGH>;
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};
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