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powerpc/thp: Add write barrier after updating the valid bit

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With hugepages, we store the hpte valid information in the pte page
whose address is stored in the second half of the PMD. Use a
write barrier to make sure clearing pmd busy bit and updating
hpte valid info are ordered properly.

CC: <stable@vger.kernel.org>
Signed-off-by: Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
This commit is contained in:
Aneesh Kumar K.V 2014-08-13 12:31:57 +05:30 committed by Benjamin Herrenschmidt
parent 2fabf084b6
commit b0aa44a3df
1 changed files with 4 additions and 1 deletions
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5
arch/powerpc/mm/hugepage-hash64.c
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@ -172,8 +172,11 @@ int __hash_page_thp(unsigned long ea, unsigned long access, unsigned long vsid,
mark_hpte_slot_valid(hpte_slot_array, index, slot);
}
/*
* No need to use ldarx/stdcx here
* The hpte valid is stored in the pgtable whose address is in the
* second half of the PMD. Order this against clearing of the busy bit in
* huge pmd.
*/
smp_wmb();
*pmdp = __pmd(new_pmd & ~_PAGE_BUSY);
return 0;
}