mirrors/linux-stable
1
0
Fork 0
mirror of https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git synced 2024-10-01 06:33:07 +00:00
Code Issues Releases Wiki Activity

ARM: dts: stm32: Add alternate pinmux for FMC EBI bus

Browse source 
Add another mux option for FMC EBI bus, this is used on DHCOM SoM
for the second ethernet and on the PDK2 devkit for SRAM.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Alexandre Torgue <alexandre.torgue@st.com>
Cc: Maxime Coquelin <mcoquelin.stm32@gmail.com>
Cc: Patrice Chotard <patrice.chotard@st.com>
Cc: Patrick Delaunay <patrick.delaunay@st.com>
Cc: linux-stm32@st-md-mailman.stormreply.com
To: linux-arm-kernel@lists.infradead.org
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
This commit is contained in:
Marek Vasut 2020-10-08 21:37:59 +02:00 committed by Alexandre Torgue
parent 516728273d
commit b0c0c8b400
1 changed files with 55 additions and 0 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

55
arch/arm/boot/dts/stm32mp15-pinctrl.dtsi
View file

@ -349,6 +349,61 @@ pins {
};
};
fmc_pins_b: fmc-1 {
pins {
pinmux = <STM32_PINMUX('D', 4, AF12)>, /* FMC_NOE */
<STM32_PINMUX('D', 5, AF12)>, /* FMC_NWE */
<STM32_PINMUX('B', 7, AF12)>, /* FMC_NL */
<STM32_PINMUX('D', 14, AF12)>, /* FMC_D0 */
<STM32_PINMUX('D', 15, AF12)>, /* FMC_D1 */
<STM32_PINMUX('D', 0, AF12)>, /* FMC_D2 */
<STM32_PINMUX('D', 1, AF12)>, /* FMC_D3 */
<STM32_PINMUX('E', 7, AF12)>, /* FMC_D4 */
<STM32_PINMUX('E', 8, AF12)>, /* FMC_D5 */
<STM32_PINMUX('E', 9, AF12)>, /* FMC_D6 */
<STM32_PINMUX('E', 10, AF12)>, /* FMC_D7 */
<STM32_PINMUX('E', 11, AF12)>, /* FMC_D8 */
<STM32_PINMUX('E', 12, AF12)>, /* FMC_D9 */
<STM32_PINMUX('E', 13, AF12)>, /* FMC_D10 */
<STM32_PINMUX('E', 14, AF12)>, /* FMC_D11 */
<STM32_PINMUX('E', 15, AF12)>, /* FMC_D12 */
<STM32_PINMUX('D', 8, AF12)>, /* FMC_D13 */
<STM32_PINMUX('D', 9, AF12)>, /* FMC_D14 */
<STM32_PINMUX('D', 10, AF12)>, /* FMC_D15 */
<STM32_PINMUX('G', 9, AF12)>, /* FMC_NE2_FMC_NCE */
<STM32_PINMUX('G', 12, AF12)>; /* FMC_NE4 */
bias-disable;
drive-push-pull;
slew-rate = <3>;
};
};
fmc_sleep_pins_b: fmc-sleep-1 {
pins {
pinmux = <STM32_PINMUX('D', 4, ANALOG)>, /* FMC_NOE */
<STM32_PINMUX('D', 5, ANALOG)>, /* FMC_NWE */
<STM32_PINMUX('B', 7, ANALOG)>, /* FMC_NL */
<STM32_PINMUX('D', 14, ANALOG)>, /* FMC_D0 */
<STM32_PINMUX('D', 15, ANALOG)>, /* FMC_D1 */
<STM32_PINMUX('D', 0, ANALOG)>, /* FMC_D2 */
<STM32_PINMUX('D', 1, ANALOG)>, /* FMC_D3 */
<STM32_PINMUX('E', 7, ANALOG)>, /* FMC_D4 */
<STM32_PINMUX('E', 8, ANALOG)>, /* FMC_D5 */
<STM32_PINMUX('E', 9, ANALOG)>, /* FMC_D6 */
<STM32_PINMUX('E', 10, ANALOG)>, /* FMC_D7 */
<STM32_PINMUX('E', 11, ANALOG)>, /* FMC_D8 */
<STM32_PINMUX('E', 12, ANALOG)>, /* FMC_D9 */
<STM32_PINMUX('E', 13, ANALOG)>, /* FMC_D10 */
<STM32_PINMUX('E', 14, ANALOG)>, /* FMC_D11 */
<STM32_PINMUX('E', 15, ANALOG)>, /* FMC_D12 */
<STM32_PINMUX('D', 8, ANALOG)>, /* FMC_D13 */
<STM32_PINMUX('D', 9, ANALOG)>, /* FMC_D14 */
<STM32_PINMUX('D', 10, ANALOG)>, /* FMC_D15 */
<STM32_PINMUX('G', 9, ANALOG)>, /* FMC_NE2_FMC_NCE */
<STM32_PINMUX('G', 12, ANALOG)>; /* FMC_NE4 */
};
};
i2c1_pins_a: i2c1-0 {
pins {
pinmux = <STM32_PINMUX('D', 12, AF5)>, /* I2C1_SCL */