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dw_dmac: Pass Channel Allocation Order from platform_data
In SPEAr Platform channels 4-7 have more Fifo depth. So we must get better channel first. This patch introduces concept of channel allocation order in dw_dmac. If user doesn't pass anything or 0, than normal (ascending) channel allocation will follow, else channels will be allocated in descending order. Signed-off-by: Viresh Kumar <viresh.kumar@st.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
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2 changed files with 8 additions and 1 deletions
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@ -1319,7 +1319,11 @@ static int __init dw_probe(struct platform_device *pdev)
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dwc->chan.device = &dw->dma;
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dwc->chan.cookie = dwc->completed = 1;
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dwc->chan.chan_id = i;
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list_add_tail(&dwc->chan.device_node, &dw->dma.channels);
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if (pdata->chan_allocation_order == CHAN_ALLOCATION_ASCENDING)
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list_add_tail(&dwc->chan.device_node,
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&dw->dma.channels);
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else
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list_add(&dwc->chan.device_node, &dw->dma.channels);
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dwc->ch_regs = &__dw_regs(dw)->CHAN[i];
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spin_lock_init(&dwc->lock);
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@ -22,6 +22,9 @@
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struct dw_dma_platform_data {
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unsigned int nr_channels;
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bool is_private;
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#define CHAN_ALLOCATION_ASCENDING 0 /* zero to seven */
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#define CHAN_ALLOCATION_DESCENDING 1 /* seven to zero */
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unsigned char chan_allocation_order;
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};
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/**
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