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iio: adc: meson-saradc: Meson8 and Meson8b do not have REG11 and REG13
commit96748823c4
upstream. The Meson GXBB and newer SoCs have a few more registers than the older Meson8 and Meson8b SoCs. Use a separate regmap config to limit the older SoCs to the DELTA_10 register. Fixes:6c76ed31cd
("iio: adc: meson-saradc: add Meson8b SoC compatibility") Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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b6c6d01a2d
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b13ec02ab4
1 changed files with 15 additions and 2 deletions
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@ -224,6 +224,7 @@ struct meson_sar_adc_data {
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u32 bandgap_reg;
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unsigned int resolution;
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const char *name;
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const struct regmap_config *regmap_config;
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};
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struct meson_sar_adc_priv {
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@ -243,13 +244,20 @@ struct meson_sar_adc_priv {
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int calibscale;
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};
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static const struct regmap_config meson_sar_adc_regmap_config = {
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static const struct regmap_config meson_sar_adc_regmap_config_gxbb = {
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.reg_bits = 8,
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.val_bits = 32,
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.reg_stride = 4,
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.max_register = MESON_SAR_ADC_REG13,
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};
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static const struct regmap_config meson_sar_adc_regmap_config_meson8 = {
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.reg_bits = 8,
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.val_bits = 32,
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.reg_stride = 4,
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.max_register = MESON_SAR_ADC_DELTA_10,
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};
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static unsigned int meson_sar_adc_get_fifo_count(struct iio_dev *indio_dev)
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{
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struct meson_sar_adc_priv *priv = iio_priv(indio_dev);
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@ -860,6 +868,7 @@ static const struct iio_info meson_sar_adc_iio_info = {
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static const struct meson_sar_adc_data meson_sar_adc_meson8_data = {
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.has_bl30_integration = false,
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.bandgap_reg = MESON_SAR_ADC_DELTA_10,
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.regmap_config = &meson_sar_adc_regmap_config_meson8,
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.resolution = 10,
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.name = "meson-meson8-saradc",
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};
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@ -867,6 +876,7 @@ static const struct meson_sar_adc_data meson_sar_adc_meson8_data = {
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static const struct meson_sar_adc_data meson_sar_adc_meson8b_data = {
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.has_bl30_integration = false,
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.bandgap_reg = MESON_SAR_ADC_DELTA_10,
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.regmap_config = &meson_sar_adc_regmap_config_meson8,
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.resolution = 10,
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.name = "meson-meson8b-saradc",
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};
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@ -874,6 +884,7 @@ static const struct meson_sar_adc_data meson_sar_adc_meson8b_data = {
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static const struct meson_sar_adc_data meson_sar_adc_gxbb_data = {
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.has_bl30_integration = true,
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.bandgap_reg = MESON_SAR_ADC_REG11,
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.regmap_config = &meson_sar_adc_regmap_config_gxbb,
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.resolution = 10,
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.name = "meson-gxbb-saradc",
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};
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@ -881,6 +892,7 @@ static const struct meson_sar_adc_data meson_sar_adc_gxbb_data = {
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static const struct meson_sar_adc_data meson_sar_adc_gxl_data = {
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.has_bl30_integration = true,
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.bandgap_reg = MESON_SAR_ADC_REG11,
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.regmap_config = &meson_sar_adc_regmap_config_gxbb,
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.resolution = 12,
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.name = "meson-gxl-saradc",
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};
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@ -888,6 +900,7 @@ static const struct meson_sar_adc_data meson_sar_adc_gxl_data = {
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static const struct meson_sar_adc_data meson_sar_adc_gxm_data = {
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.has_bl30_integration = true,
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.bandgap_reg = MESON_SAR_ADC_REG11,
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.regmap_config = &meson_sar_adc_regmap_config_gxbb,
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.resolution = 12,
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.name = "meson-gxm-saradc",
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};
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@ -965,7 +978,7 @@ static int meson_sar_adc_probe(struct platform_device *pdev)
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return ret;
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priv->regmap = devm_regmap_init_mmio(&pdev->dev, base,
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&meson_sar_adc_regmap_config);
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priv->data->regmap_config);
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if (IS_ERR(priv->regmap))
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return PTR_ERR(priv->regmap);
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