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spi: cadence-quadspi: add missing clk_disable_unprepare() in cqspi_probe()
[ Upstream commit5cb475174c
] cqspi_jh7110_clk_init() is called after clk_prepare_enable(cqspi->clk), if it fails, it should goto label 'probe_reset_failed' to disable cqspi->clk. In the error path after calling cqspi_jh7110_clk_init(), cqspi_jh7110_disable_clk() need be called. Fixes:33f1ef6d4e
("spi: cadence-quadspi: Add clock configuration for StarFive JH7110 QSPI") Signed-off-by: Yang Yingliang <yangyingliang@huawei.com> Link: https://lore.kernel.org/r/20231129081147.628004-1-yangyingliang@huawei.com Signed-off-by: Mark Brown <broonie@kernel.org> Signed-off-by: Sasha Levin <sashal@kernel.org>
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parent
69c2d6e40d
commit
b1432249f1
1 changed files with 3 additions and 1 deletions
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@ -1825,7 +1825,7 @@ static int cqspi_probe(struct platform_device *pdev)
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if (ddata->jh7110_clk_init) {
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ret = cqspi_jh7110_clk_init(pdev, cqspi);
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if (ret)
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goto probe_clk_failed;
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goto probe_reset_failed;
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}
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if (of_device_is_compatible(pdev->dev.of_node,
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@ -1872,6 +1872,8 @@ static int cqspi_probe(struct platform_device *pdev)
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probe_setup_failed:
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cqspi_controller_enable(cqspi, 0);
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probe_reset_failed:
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if (cqspi->is_jh7110)
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cqspi_jh7110_disable_clk(pdev, cqspi);
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clk_disable_unprepare(cqspi->clk);
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probe_clk_failed:
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pm_runtime_put_sync(dev);
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