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drm/amd/display: revert support for DID2.0 dsc passthrough
3x4K60 displays over MST with DSC enabled was not able to light up due to this patch. Signed-off-by: Jun Lei <jun.lei@amd.com> Reviewed-by: Anthony Koo <Anthony.Koo@amd.com> Acked-by: Anson Jacob <Anson.Jacob@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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parent
765ff7ad58
commit
b14e4f2004
3 changed files with 14 additions and 23 deletions
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@ -51,7 +51,6 @@ struct dc_dsc_policy {
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int min_slice_height; // Must not be less than 8
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uint32_t max_target_bpp;
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uint32_t min_target_bpp;
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uint32_t preferred_bpp_x16;
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bool enable_dsc_when_not_needed;
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};
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@ -63,8 +62,8 @@ bool dc_dsc_parse_dsc_dpcd(const struct dc *dc,
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bool dc_dsc_compute_bandwidth_range(
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const struct display_stream_compressor *dsc,
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uint32_t dsc_min_slice_height_override,
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uint32_t min_bpp_x16,
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uint32_t max_bpp_x16,
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uint32_t min_bpp,
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uint32_t max_bpp,
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const struct dsc_dec_dpcd_caps *dsc_sink_caps,
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const struct dc_crtc_timing *timing,
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struct dc_dsc_bw_range *range);
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@ -79,7 +78,7 @@ bool dc_dsc_compute_config(
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struct dc_dsc_config *dsc_cfg);
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void dc_dsc_get_policy_for_timing(const struct dc_crtc_timing *timing,
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uint32_t max_target_bpp_limit_override_x16,
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uint32_t max_target_bpp_limit_override,
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struct dc_dsc_policy *policy);
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void dc_dsc_policy_set_max_target_bpp_limit(uint32_t limit);
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@ -769,7 +769,6 @@ struct dc_crtc_timing {
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#endif
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struct dc_crtc_timing_flags flags;
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uint32_t dsc_fixed_bits_per_pixel_x16; /* DSC target bitrate in 1/16 of bpp (e.g. 128 -> 8bpp) */
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struct dc_dsc_config dsc_cfg;
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};
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@ -369,11 +369,6 @@ static bool decide_dsc_target_bpp_x16(
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/* enough bandwidth without dsc */
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*target_bpp_x16 = 0;
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should_use_dsc = false;
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} else if (policy->preferred_bpp_x16 > 0 &&
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policy->preferred_bpp_x16 <= range.max_target_bpp_x16 &&
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policy->preferred_bpp_x16 >= range.min_target_bpp_x16) {
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*target_bpp_x16 = policy->preferred_bpp_x16;
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should_use_dsc = true;
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} else if (target_bandwidth_kbps >= range.max_kbps) {
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/* use max target bpp allowed */
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*target_bpp_x16 = range.max_target_bpp_x16;
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@ -550,7 +545,7 @@ static bool setup_dsc_config(
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int target_bandwidth_kbps,
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const struct dc_crtc_timing *timing,
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int min_slice_height_override,
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int max_dsc_target_bpp_limit_override_x16,
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int max_dsc_target_bpp_limit_override,
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struct dc_dsc_config *dsc_cfg)
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{
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struct dsc_enc_caps dsc_common_caps;
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@ -569,7 +564,7 @@ static bool setup_dsc_config(
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memset(dsc_cfg, 0, sizeof(struct dc_dsc_config));
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dc_dsc_get_policy_for_timing(timing, max_dsc_target_bpp_limit_override_x16, &policy);
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dc_dsc_get_policy_for_timing(timing, max_dsc_target_bpp_limit_override, &policy);
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pic_width = timing->h_addressable + timing->h_border_left + timing->h_border_right;
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pic_height = timing->v_addressable + timing->v_border_top + timing->v_border_bottom;
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@ -870,8 +865,8 @@ bool dc_dsc_parse_dsc_dpcd(const struct dc *dc, const uint8_t *dpcd_dsc_basic_da
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bool dc_dsc_compute_bandwidth_range(
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const struct display_stream_compressor *dsc,
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uint32_t dsc_min_slice_height_override,
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uint32_t min_bpp_x16,
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uint32_t max_bpp_x16,
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uint32_t min_bpp,
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uint32_t max_bpp,
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const struct dsc_dec_dpcd_caps *dsc_sink_caps,
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const struct dc_crtc_timing *timing,
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struct dc_dsc_bw_range *range)
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@ -888,10 +883,10 @@ bool dc_dsc_compute_bandwidth_range(
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if (is_dsc_possible)
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is_dsc_possible = setup_dsc_config(dsc_sink_caps, &dsc_enc_caps, 0, timing,
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dsc_min_slice_height_override, max_bpp_x16, &config);
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dsc_min_slice_height_override, max_bpp, &config);
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if (is_dsc_possible)
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get_dsc_bandwidth_range(min_bpp_x16, max_bpp_x16, &dsc_common_caps, timing, range);
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get_dsc_bandwidth_range(min_bpp, max_bpp, &dsc_common_caps, timing, range);
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return is_dsc_possible;
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}
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@ -900,7 +895,7 @@ bool dc_dsc_compute_config(
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const struct display_stream_compressor *dsc,
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const struct dsc_dec_dpcd_caps *dsc_sink_caps,
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uint32_t dsc_min_slice_height_override,
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uint32_t max_target_bpp_limit_override_x16,
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uint32_t max_target_bpp_limit_override,
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uint32_t target_bandwidth_kbps,
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const struct dc_crtc_timing *timing,
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struct dc_dsc_config *dsc_cfg)
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@ -913,11 +908,11 @@ bool dc_dsc_compute_config(
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&dsc_enc_caps,
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target_bandwidth_kbps,
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timing, dsc_min_slice_height_override,
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max_target_bpp_limit_override_x16, dsc_cfg);
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max_target_bpp_limit_override, dsc_cfg);
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return is_dsc_possible;
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}
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void dc_dsc_get_policy_for_timing(const struct dc_crtc_timing *timing, uint32_t max_target_bpp_limit_override_x16, struct dc_dsc_policy *policy)
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void dc_dsc_get_policy_for_timing(const struct dc_crtc_timing *timing, uint32_t max_target_bpp_limit_override, struct dc_dsc_policy *policy)
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{
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uint32_t bpc = 0;
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@ -972,15 +967,13 @@ void dc_dsc_get_policy_for_timing(const struct dc_crtc_timing *timing, uint32_t
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return;
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}
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policy->preferred_bpp_x16 = timing->dsc_fixed_bits_per_pixel_x16;
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/* internal upper limit, default 16 bpp */
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if (policy->max_target_bpp > dsc_policy_max_target_bpp_limit)
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policy->max_target_bpp = dsc_policy_max_target_bpp_limit;
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/* apply override */
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if (max_target_bpp_limit_override_x16 && policy->max_target_bpp > max_target_bpp_limit_override_x16 / 16)
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policy->max_target_bpp = max_target_bpp_limit_override_x16 / 16;
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if (max_target_bpp_limit_override && policy->max_target_bpp > max_target_bpp_limit_override)
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policy->max_target_bpp = max_target_bpp_limit_override;
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/* enable DSC when not needed, default false */
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if (dsc_policy_enable_dsc_when_not_needed)
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