mvebu dt64 for 5.4 (part 1)

- Add mailbox support on Armada 37xx
  - Add cpu clock node needed for CPU freq on Armada 7K/8K
  - Enhance CP110 COMPHY support used by PCIe, USB3 and SATA
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Merge tag 'mvebu-dt64-5.4-1' of git://git.infradead.org/linux-mvebu into arm/dt

mvebu dt64 for 5.4 (part 1)

 - Add mailbox support on Armada 37xx
 - Add cpu clock node needed for CPU freq on Armada 7K/8K
 - Enhance CP110 COMPHY support used by PCIe, USB3 and SATA

* tag 'mvebu-dt64-5.4-1' of git://git.infradead.org/linux-mvebu:
  arm64: dts: marvell: Add cpu clock node on Armada 7K/8K
  arm64: dts: marvell: Convert 7k/8k usb-phy properties to phy-supply
  arm64: dts: marvell: Add 7k/8k PHYs in PCIe nodes
  arm64: dts: marvell: Add 7k/8k PHYs in USB3 nodes
  arm64: dts: marvell: Add 7k/8k per-port PHYs in SATA nodes
  arm64: dts: marvell: Add CP110 COMPHY clocks
  arm64: dts: marvell: armada-37xx: add mailbox node

Link: https://lore.kernel.org/r/875zmhzjml.fsf@FE-laptop
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
Arnd Bergmann 2019-09-03 16:16:50 +02:00
commit b1761ebea6
8 changed files with 140 additions and 34 deletions

View file

@ -419,6 +419,13 @@ crypto: crypto@90000 {
clocks = <&nb_periph_clk 15>;
};
rwtm: mailbox@b0000 {
compatible = "marvell,armada-3700-rwtm-mailbox";
reg = <0xb0000 0x100>;
interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>;
#mbox-cells = <1>;
};
sdhci1: sdhci@d0000 {
compatible = "marvell,armada-3700-sdhci",
"marvell,sdhci-xenon";

View file

@ -73,16 +73,6 @@ cp0_reg_usb3_1_vbus: cp0-usb3-1-vbus {
gpio = <&expander0 1 GPIO_ACTIVE_HIGH>;
vin-supply = <&cp0_exp_usb3_1_current_regulator>;
};
cp0_usb3_0_phy: cp0-usb3-0-phy {
compatible = "usb-nop-xceiv";
vcc-supply = <&cp0_reg_usb3_0_vbus>;
};
cp0_usb3_1_phy: cp0-usb3-1-phy {
compatible = "usb-nop-xceiv";
vcc-supply = <&cp0_reg_usb3_1_vbus>;
};
};
&i2c0 {
@ -124,6 +114,8 @@ &uart0 {
&cp0_pcie2 {
status = "okay";
phys = <&cp0_comphy5 2>;
phy-names = "cp0-pcie2-x1-phy";
};
&cp0_i2c0 {
@ -219,15 +211,36 @@ partition@400000 {
&cp0_sata0 {
status = "okay";
sata-port@1 {
phys = <&cp0_comphy3 1>;
phy-names = "cp0-sata0-1-phy";
};
};
&cp0_comphy1 {
cp0_usbh0_con: connector {
compatible = "usb-a-connector";
phy-supply = <&cp0_reg_usb3_0_vbus>;
};
};
&cp0_usb3_0 {
usb-phy = <&cp0_usb3_0_phy>;
phys = <&cp0_comphy1 0>;
phy-names = "cp0-usb3h0-comphy";
status = "okay";
};
&cp0_comphy4 {
cp0_usbh1_con: connector {
compatible = "usb-a-connector";
phy-supply = <&cp0_reg_usb3_1_vbus>;
};
};
&cp0_usb3_1 {
usb-phy = <&cp0_usb3_1_phy>;
phys = <&cp0_comphy4 1>;
phy-names = "cp0-usb3h1-comphy";
status = "okay";
};

View file

@ -51,11 +51,6 @@ v_5v0_usb3_hst_vbus: regulator-usb3-vbus0 {
status = "okay";
};
usb3h0_phy: usb3_phy0 {
compatible = "usb-nop-xceiv";
vcc-supply = <&v_5v0_usb3_hst_vbus>;
};
sfp_cp0_eth0: sfp-cp0-eth0 {
compatible = "sff,sfp";
i2c-bus = <&cp0_i2c1>;
@ -243,6 +238,8 @@ &cp0_pcie0 {
pinctrl-names = "default";
pinctrl-0 = <&cp0_pci0_reset_pins &cp0_wlan_disable_pins>;
reset-gpios = <&cp0_gpio2 0 GPIO_ACTIVE_LOW>;
phys = <&cp0_comphy0 0>;
phy-names = "cp0-pcie0-x1-phy";
status = "okay";
};
@ -348,6 +345,11 @@ cp1_wps_button_pins: wps-button-pins {
&cp1_sata0 {
pinctrl-0 = <&cp0_pci1_reset_pins>;
status = "okay";
sata-port@1 {
phys = <&cp1_comphy0 1>;
phy-names = "cp1-sata0-1-phy";
};
};
&cp1_mdio {
@ -467,7 +469,15 @@ spi-flash@0 {
};
};
&cp1_comphy2 {
cp1_usbh0_con: connector {
compatible = "usb-a-connector";
phy-supply = <&v_5v0_usb3_hst_vbus>;
};
};
&cp1_usb3_0 {
usb-phy = <&usb3h0_phy>;
phys = <&cp1_comphy2 0>;
phy-names = "cp1-usb3h0-comphy";
status = "okay";
};

View file

@ -54,11 +54,6 @@ cp0_usb3_0_phy: cp0-usb3-0-phy {
vcc-supply = <&cp0_reg_usb3_0_vbus>;
};
cp0_usb3_1_phy: cp0-usb3-1-phy {
compatible = "usb-nop-xceiv";
vcc-supply = <&cp0_reg_usb3_1_vbus>;
};
cp1_reg_usb3_0_vbus: cp1-usb3-0-vbus {
compatible = "regulator-fixed";
regulator-name = "cp1-usb3h0-vbus";
@ -108,11 +103,15 @@ &uart0 {
/* CON6 on CP0 expansion */
&cp0_pcie0 {
phys = <&cp0_comphy0 0>;
phy-names = "cp0-pcie0-x1-phy";
status = "okay";
};
/* CON5 on CP0 expansion */
&cp0_pcie2 {
phys = <&cp0_comphy5 2>;
phy-names = "cp0-pcie2-x1-phy";
status = "okay";
};
@ -143,6 +142,15 @@ expander1: pca9555@25 {
/* CON4 on CP0 expansion */
&cp0_sata0 {
status = "okay";
sata-port@0 {
phys = <&cp0_comphy1 0>;
phy-names = "cp0-sata0-0-phy";
};
sata-port@1 {
phys = <&cp0_comphy3 1>;
phy-names = "cp0-sata0-1-phy";
};
};
/* CON9 on CP0 expansion */
@ -151,9 +159,17 @@ &cp0_usb3_0 {
status = "okay";
};
&cp0_comphy4 {
cp0_usbh1_con: connector {
compatible = "usb-a-connector";
phy-supply = <&cp0_reg_usb3_1_vbus>;
};
};
/* CON10 on CP0 expansion */
&cp0_usb3_1 {
usb-phy = <&cp0_usb3_1_phy>;
phys = <&cp0_comphy4 1>;
phy-names = "cp0-usb3h1-comphy";
status = "okay";
};
@ -187,16 +203,22 @@ &cp0_eth2 {
/* CON6 on CP1 expansion */
&cp1_pcie0 {
phys = <&cp1_comphy0 0>;
phy-names = "cp1-pcie0-x1-phy";
status = "okay";
};
/* CON7 on CP1 expansion */
&cp1_pcie1 {
phys = <&cp1_comphy4 1>;
phy-names = "cp1-pcie1-x1-phy";
status = "okay";
};
/* CON5 on CP1 expansion */
&cp1_pcie2 {
phys = <&cp1_comphy5 2>;
phy-names = "cp1-pcie2-x1-phy";
status = "okay";
};
@ -273,6 +295,15 @@ partition@1000000 {
/* CON4 on CP1 expansion */
&cp1_sata0 {
status = "okay";
sata-port@0 {
phys = <&cp1_comphy1 0>;
phy-names = "cp1-sata0-0-phy";
};
sata-port@1 {
phys = <&cp1_comphy3 1>;
phy-names = "cp1-sata0-1-phy";
};
};
/* CON9 on CP1 expansion */

View file

@ -61,11 +61,6 @@ v_5v0_usb3_hst_vbus: regulator-usb3-vbus0 {
status = "okay";
};
usb3h0_phy: usb3_phy0 {
compatible = "usb-nop-xceiv";
vcc-supply = <&v_5v0_usb3_hst_vbus>;
};
sfp_eth0: sfp-eth0 {
/* CON15,16 - CPM lane 4 */
compatible = "sff,sfp";
@ -186,6 +181,10 @@ &cp0_pcie0 {
reset-gpios = <&cp0_gpio2 20 GPIO_ACTIVE_LOW>;
ranges = <0x81000000 0x0 0xf9010000 0x0 0xf9010000 0x0 0x10000
0x82000000 0x0 0xc0000000 0x0 0xc0000000 0x0 0x20000000>;
phys = <&cp0_comphy0 0>, <&cp0_comphy1 0>,
<&cp0_comphy2 0>, <&cp0_comphy3 0>;
phy-names = "cp0-pcie0-x4-lane0-phy", "cp0-pcie0-x4-lane1-phy",
"cp0-pcie0-x4-lane2-phy", "cp0-pcie0-x4-lane3-phy";
status = "okay";
};
@ -239,8 +238,13 @@ &cp0_eth0 {
};
&cp0_sata0 {
/* CPM Lane 0 - U29 */
status = "okay";
/* CPM Lane 5 - U29 */
sata-port@1 {
phys = <&cp0_comphy5 1>;
phy-names = "cp0-sata0-1-phy";
};
};
&cp0_sdhci0 {
@ -324,9 +328,19 @@ &cp1_uart0 {
};
&cp1_sata0 {
/* CPS Lane 1 - U32 */
/* CPS Lane 3 - U31 */
status = "okay";
/* CPS Lane 1 - U32 */
sata-port@0 {
phys = <&cp1_comphy1 0>;
phy-names = "cp1-sata0-0-phy";
};
/* CPS Lane 3 - U31 */
sata-port@1 {
phys = <&cp1_comphy3 1>;
phy-names = "cp1-sata0-1-phy";
};
};
&cp1_spi1 {
@ -341,8 +355,16 @@ spi-flash@0 {
};
};
&cp1_comphy2 {
cp1_usbh0_con: connector {
compatible = "usb-a-connector";
phy-supply = <&v_5v0_usb3_hst_vbus>;
};
};
&cp1_usb3_0 {
/* CPS Lane 2 - CON7 */
usb-phy = <&usb3h0_phy>;
phys = <&cp1_comphy2 0>;
phy-names = "cp1-usb3h0-comphy";
status = "okay";
};

View file

@ -21,6 +21,7 @@ cpu0: cpu@0 {
reg = <0x000>;
enable-method = "psci";
#cooling-cells = <2>;
clocks = <&cpu_clk 0>;
};
cpu1: cpu@1 {
device_type = "cpu";
@ -28,6 +29,7 @@ cpu1: cpu@1 {
reg = <0x001>;
enable-method = "psci";
#cooling-cells = <2>;
clocks = <&cpu_clk 0>;
};
cpu2: cpu@100 {
device_type = "cpu";
@ -35,6 +37,7 @@ cpu2: cpu@100 {
reg = <0x100>;
enable-method = "psci";
#cooling-cells = <2>;
clocks = <&cpu_clk 1>;
};
cpu3: cpu@101 {
device_type = "cpu";
@ -42,7 +45,7 @@ cpu3: cpu@101 {
reg = <0x101>;
enable-method = "psci";
#cooling-cells = <2>;
clocks = <&cpu_clk 1>;
};
};
};

View file

@ -280,6 +280,13 @@ ap_syscon1: system-controller@6f8000 {
#address-cells = <1>;
#size-cells = <1>;
cpu_clk: clock-cpu@278 {
compatible = "marvell,ap806-cpu-clock";
clocks = <&ap_clk 0>, <&ap_clk 1>;
#clock-cells = <1>;
reg = <0x278 0xa30>;
};
ap_thermal: thermal-sensor@80 {
compatible = "marvell,armada-ap806-thermal";
reg = <0x80 0x10>;

View file

@ -133,6 +133,9 @@ CP110_LABEL(comphy): phy@120000 {
compatible = "marvell,comphy-cp110";
reg = <0x120000 0x6000>;
marvell,system-controller = <&CP110_LABEL(syscon0)>;
clocks = <&CP110_LABEL(clk) 1 5>, <&CP110_LABEL(clk) 1 6>,
<&CP110_LABEL(clk) 1 18>;
clock-names = "mg_clk", "mg_core_clk", "axi_clk";
#address-cells = <1>;
#size-cells = <0>;
@ -306,7 +309,17 @@ CP110_LABEL(sata0): sata@540000 {
interrupts = <107 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&CP110_LABEL(clk) 1 15>,
<&CP110_LABEL(clk) 1 16>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
sata-port@0 {
reg = <0>;
};
sata-port@1 {
reg = <1>;
};
};
CP110_LABEL(xor0): xor@6a0000 {