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drivers/perf: pmuv3: don't expose SW_INCR event in sysfs
[ Upstream commitca6f537e45
] The SW_INCR event is somewhat unusual, and depends on the specific HW counter that it is programmed into. When programmed into PMEVCNTR<n>, SW_INCR will count any writes to PMSWINC_EL0 with bit n set, ignoring writes to SW_INCR with bit n clear. Event rotation means that there's no fixed relationship between perf_events and HW counters, so this isn't all that useful. Further, we program PMUSERENR.{SW,EN}=={0,0}, which causes EL0 writes to PMSWINC_EL0 to be trapped and handled as UNDEFINED, resulting in a SIGILL to userspace. Given that, it's not a good idea to expose SW_INCR in sysfs. Hide it as we did for CHAIN back in commit:4ba2578fa7
("arm64: perf: don't expose CHAIN event in sysfs") Signed-off-by: Mark Rutland <mark.rutland@arm.com> Cc: Will Deacon <will@kernel.org> Link: https://lore.kernel.org/r/20231204115847.2993026-1-mark.rutland@arm.com Signed-off-by: Will Deacon <will@kernel.org> Signed-off-by: Sasha Levin <sashal@kernel.org>
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1 changed files with 5 additions and 1 deletions
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@ -168,7 +168,11 @@ armv8pmu_events_sysfs_show(struct device *dev,
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PMU_EVENT_ATTR_ID(name, armv8pmu_events_sysfs_show, config)
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PMU_EVENT_ATTR_ID(name, armv8pmu_events_sysfs_show, config)
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static struct attribute *armv8_pmuv3_event_attrs[] = {
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static struct attribute *armv8_pmuv3_event_attrs[] = {
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ARMV8_EVENT_ATTR(sw_incr, ARMV8_PMUV3_PERFCTR_SW_INCR),
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/*
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* Don't expose the sw_incr event in /sys. It's not usable as writes to
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* PMSWINC_EL0 will trap as PMUSERENR.{SW,EN}=={0,0} and event rotation
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* means we don't have a fixed event<->counter relationship regardless.
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*/
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ARMV8_EVENT_ATTR(l1i_cache_refill, ARMV8_PMUV3_PERFCTR_L1I_CACHE_REFILL),
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ARMV8_EVENT_ATTR(l1i_cache_refill, ARMV8_PMUV3_PERFCTR_L1I_CACHE_REFILL),
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ARMV8_EVENT_ATTR(l1i_tlb_refill, ARMV8_PMUV3_PERFCTR_L1I_TLB_REFILL),
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ARMV8_EVENT_ATTR(l1i_tlb_refill, ARMV8_PMUV3_PERFCTR_L1I_TLB_REFILL),
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ARMV8_EVENT_ATTR(l1d_cache_refill, ARMV8_PMUV3_PERFCTR_L1D_CACHE_REFILL),
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ARMV8_EVENT_ATTR(l1d_cache_refill, ARMV8_PMUV3_PERFCTR_L1D_CACHE_REFILL),
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