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ixgbe: Use affinity_hint when Flow Director is enabled

Browse source 
Use the new infrastructure to balance interrupts for flow
alignment when ATR or Flow Director are enabled.

Signed-off-by: Peter P Waskiewicz Jr <peter.p.waskiewicz.jr@intel.com>
Tested-by: Stephen Ko <stephen.s.ko@intel.com>
Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
Peter Waskiewicz 2010-10-05 01:27:49 +00:00 committed by David S. Miller
parent 9deec17f9f
commit b25ebfd21b
2 changed files with 27 additions and 0 deletions
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2
drivers/net/ixgbe/ixgbe.h
View file

@ -31,6 +31,7 @@
#include <linux/types.h>
#include <linux/pci.h>
#include <linux/netdevice.h>
#include <linux/cpumask.h>
#include <linux/aer.h>
#include "ixgbe_type.h"
@ -241,6 +242,7 @@ struct ixgbe_q_vector {
u8 tx_itr;
u8 rx_itr;
u32 eitr;
cpumask_var_t affinity_mask;
};
/* Helper macros to switch between ints/sec and what the register uses.

25
drivers/net/ixgbe/ixgbe_main.c
View file

@ -1433,6 +1433,21 @@ static void ixgbe_configure_msix(struct ixgbe_adapter *adapter)
q_vector->eitr = adapter->rx_eitr_param;
ixgbe_write_eitr(q_vector);
/* If Flow Director is enabled, set interrupt affinity */
if ((adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE) ||
(adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE)) {
/*
* Allocate the affinity_hint cpumask, assign the mask
* for this vector, and set our affinity_hint for
* this irq.
*/
if (!alloc_cpumask_var(&q_vector->affinity_mask,
GFP_KERNEL))
return;
cpumask_set_cpu(v_idx, q_vector->affinity_mask);
irq_set_affinity_hint(adapter->msix_entries[v_idx].vector,
q_vector->affinity_mask);
}
}
if (adapter->hw.mac.type == ixgbe_mac_82598EB)
@ -3816,6 +3831,7 @@ void ixgbe_down(struct ixgbe_adapter *adapter)
u32 rxctrl;
u32 txdctl;
int i, j;
int num_q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
/* signal that we are down to the interrupt handler */
set_bit(__IXGBE_DOWN, &adapter->state);
@ -3854,6 +3870,15 @@ void ixgbe_down(struct ixgbe_adapter *adapter)
ixgbe_napi_disable_all(adapter);
/* Cleanup the affinity_hint CPU mask memory and callback */
for (i = 0; i < num_q_vectors; i++) {
struct ixgbe_q_vector *q_vector = adapter->q_vector[i];
/* clear the affinity_mask in the IRQ descriptor */
irq_set_affinity_hint(adapter->msix_entries[i]. vector, NULL);
/* release the CPU mask memory */
free_cpumask_var(q_vector->affinity_mask);
}
if (adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE ||
adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE)
cancel_work_sync(&adapter->fdir_reinit_task);