dmaengine: shdma: Introduce include/linux/sh_dma.h
Create a common platform data header file for the shdma dmaengine driver. This is done by moving common structures from sh asm/dmaengine.h to linux/sh_dma.h. DMA registers are also copied from sh asm/dma-register.h to make the code architecture independent. The sh header file asm/dmaengine.h is still kept with the slave id enum. This allows us to keep the old processor specific code as is and slowly move over to slave id enums in per-processor headers. Signed-off-by: Magnus Damm <damm@opensource.se> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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@ -10,12 +10,7 @@
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#ifndef ASM_DMAENGINE_H
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#ifndef ASM_DMAENGINE_H
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#define ASM_DMAENGINE_H
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#define ASM_DMAENGINE_H
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#include <linux/dmaengine.h>
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#include <linux/sh_dma.h>
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#include <linux/list.h>
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#include <asm/dma-register.h>
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#define SH_DMAC_MAX_CHANNELS 6
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enum {
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enum {
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SHDMA_SLAVE_SCIF0_TX,
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SHDMA_SLAVE_SCIF0_TX,
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@ -36,57 +31,4 @@ enum {
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SHDMA_SLAVE_SIUB_RX,
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SHDMA_SLAVE_SIUB_RX,
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};
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};
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struct sh_dmae_slave_config {
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unsigned int slave_id;
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dma_addr_t addr;
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u32 chcr;
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char mid_rid;
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};
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struct sh_dmae_channel {
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unsigned int offset;
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unsigned int dmars;
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unsigned int dmars_bit;
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};
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struct sh_dmae_pdata {
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struct sh_dmae_slave_config *slave;
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int slave_num;
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struct sh_dmae_channel *channel;
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int channel_num;
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unsigned int ts_low_shift;
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unsigned int ts_low_mask;
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unsigned int ts_high_shift;
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unsigned int ts_high_mask;
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unsigned int *ts_shift;
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int ts_shift_num;
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u16 dmaor_init;
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};
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struct device;
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/* Used by slave DMA clients to request DMA to/from a specific peripheral */
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struct sh_dmae_slave {
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unsigned int slave_id; /* Set by the platform */
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struct device *dma_dev; /* Set by the platform */
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struct sh_dmae_slave_config *config; /* Set by the driver */
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};
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struct sh_dmae_regs {
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u32 sar; /* SAR / source address */
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u32 dar; /* DAR / destination address */
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u32 tcr; /* TCR / transfer count */
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};
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struct sh_desc {
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struct sh_dmae_regs hw;
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struct list_head node;
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struct dma_async_tx_descriptor async_tx;
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enum dma_data_direction direction;
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dma_cookie_t cookie;
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size_t partial;
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int chunks;
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int mark;
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};
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#endif
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#endif
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@ -25,8 +25,7 @@
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#include <linux/dma-mapping.h>
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#include <linux/dma-mapping.h>
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#include <linux/platform_device.h>
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#include <linux/platform_device.h>
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#include <linux/pm_runtime.h>
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#include <linux/pm_runtime.h>
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#include <linux/sh_dma.h>
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#include <asm/dmaengine.h>
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#include "shdma.h"
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#include "shdma.h"
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#include <linux/interrupt.h>
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#include <linux/interrupt.h>
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#include <linux/list.h>
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#include <linux/list.h>
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#include <asm/dmaengine.h>
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#define SH_DMAC_MAX_CHANNELS 6
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#define SH_DMA_SLAVE_NUMBER 256
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#define SH_DMA_SLAVE_NUMBER 256
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#define SH_DMA_TCR_MAX 0x00FFFFFF /* 16MB */
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#define SH_DMA_TCR_MAX 0x00FFFFFF /* 16MB */
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@ -0,0 +1,101 @@
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/*
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* Header for the new SH dmaengine driver
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*
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* Copyright (C) 2010 Guennadi Liakhovetski <g.liakhovetski@gmx.de>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#ifndef SH_DMA_H
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#define SH_DMA_H
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#include <linux/list.h>
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#include <linux/dmaengine.h>
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/* Used by slave DMA clients to request DMA to/from a specific peripheral */
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struct sh_dmae_slave {
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unsigned int slave_id; /* Set by the platform */
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struct device *dma_dev; /* Set by the platform */
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struct sh_dmae_slave_config *config; /* Set by the driver */
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};
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struct sh_dmae_regs {
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u32 sar; /* SAR / source address */
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u32 dar; /* DAR / destination address */
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u32 tcr; /* TCR / transfer count */
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};
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struct sh_desc {
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struct sh_dmae_regs hw;
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struct list_head node;
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struct dma_async_tx_descriptor async_tx;
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enum dma_data_direction direction;
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dma_cookie_t cookie;
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size_t partial;
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int chunks;
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int mark;
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};
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struct sh_dmae_slave_config {
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unsigned int slave_id;
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dma_addr_t addr;
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u32 chcr;
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char mid_rid;
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};
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struct sh_dmae_channel {
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unsigned int offset;
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unsigned int dmars;
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unsigned int dmars_bit;
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};
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struct sh_dmae_pdata {
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struct sh_dmae_slave_config *slave;
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int slave_num;
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struct sh_dmae_channel *channel;
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int channel_num;
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unsigned int ts_low_shift;
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unsigned int ts_low_mask;
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unsigned int ts_high_shift;
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unsigned int ts_high_mask;
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unsigned int *ts_shift;
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int ts_shift_num;
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u16 dmaor_init;
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};
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/* DMA register */
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#define SAR 0x00
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#define DAR 0x04
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#define TCR 0x08
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#define CHCR 0x0C
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#define DMAOR 0x40
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/* DMAOR definitions */
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#define DMAOR_AE 0x00000004
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#define DMAOR_NMIF 0x00000002
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#define DMAOR_DME 0x00000001
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/* Definitions for the SuperH DMAC */
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#define REQ_L 0x00000000
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#define REQ_E 0x00080000
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#define RACK_H 0x00000000
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#define RACK_L 0x00040000
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#define ACK_R 0x00000000
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#define ACK_W 0x00020000
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#define ACK_H 0x00000000
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#define ACK_L 0x00010000
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#define DM_INC 0x00004000
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#define DM_DEC 0x00008000
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#define DM_FIX 0x0000c000
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#define SM_INC 0x00001000
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#define SM_DEC 0x00002000
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#define SM_FIX 0x00003000
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#define RS_IN 0x00000200
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#define RS_OUT 0x00000300
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#define TS_BLK 0x00000040
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#define TM_BUR 0x00000020
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#define CHCR_DE 0x00000001
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#define CHCR_TE 0x00000002
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#define CHCR_IE 0x00000004
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#endif
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