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drm/amdgpu: SW part of MES event log enablement
This is the generic SW part, prepare the event log buffer and dump it through debugfs Signed-off-by: shaoyunl <shaoyun.liu@amd.com> Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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4 changed files with 70 additions and 0 deletions
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@ -2147,6 +2147,8 @@ int amdgpu_debugfs_init(struct amdgpu_device *adev)
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amdgpu_debugfs_firmware_init(adev);
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amdgpu_ta_if_debugfs_init(adev);
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amdgpu_debugfs_mes_event_log_init(adev);
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#if defined(CONFIG_DRM_AMD_DC)
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if (adev->dc_enabled)
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dtn_debugfs_init(adev);
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@ -32,3 +32,5 @@ void amdgpu_debugfs_fini(struct amdgpu_device *adev);
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void amdgpu_debugfs_fence_init(struct amdgpu_device *adev);
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void amdgpu_debugfs_firmware_init(struct amdgpu_device *adev);
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void amdgpu_debugfs_gem_init(struct amdgpu_device *adev);
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void amdgpu_debugfs_mes_event_log_init(struct amdgpu_device *adev);
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@ -98,6 +98,26 @@ static int amdgpu_mes_doorbell_init(struct amdgpu_device *adev)
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return 0;
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}
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static int amdgpu_mes_event_log_init(struct amdgpu_device *adev)
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{
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int r;
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r = amdgpu_bo_create_kernel(adev, PAGE_SIZE, PAGE_SIZE,
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AMDGPU_GEM_DOMAIN_GTT,
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&adev->mes.event_log_gpu_obj,
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&adev->mes.event_log_gpu_addr,
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&adev->mes.event_log_cpu_addr);
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if (r) {
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dev_warn(adev->dev, "failed to create MES event log buffer (%d)", r);
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return r;
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}
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memset(adev->mes.event_log_cpu_addr, 0, PAGE_SIZE);
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return 0;
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}
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static void amdgpu_mes_doorbell_free(struct amdgpu_device *adev)
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{
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bitmap_free(adev->mes.doorbell_bitmap);
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@ -182,8 +202,14 @@ int amdgpu_mes_init(struct amdgpu_device *adev)
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if (r)
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goto error;
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r = amdgpu_mes_event_log_init(adev);
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if (r)
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goto error_doorbell;
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return 0;
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error_doorbell:
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amdgpu_mes_doorbell_free(adev);
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error:
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amdgpu_device_wb_free(adev, adev->mes.sch_ctx_offs);
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amdgpu_device_wb_free(adev, adev->mes.query_status_fence_offs);
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@ -199,6 +225,10 @@ int amdgpu_mes_init(struct amdgpu_device *adev)
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void amdgpu_mes_fini(struct amdgpu_device *adev)
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{
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amdgpu_bo_free_kernel(&adev->mes.event_log_gpu_obj,
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&adev->mes.event_log_gpu_addr,
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&adev->mes.event_log_cpu_addr);
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amdgpu_device_wb_free(adev, adev->mes.sch_ctx_offs);
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amdgpu_device_wb_free(adev, adev->mes.query_status_fence_offs);
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amdgpu_device_wb_free(adev, adev->mes.read_val_offs);
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@ -1479,3 +1509,34 @@ int amdgpu_mes_init_microcode(struct amdgpu_device *adev, int pipe)
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amdgpu_ucode_release(&adev->mes.fw[pipe]);
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return r;
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}
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#if defined(CONFIG_DEBUG_FS)
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static int amdgpu_debugfs_mes_event_log_show(struct seq_file *m, void *unused)
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{
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struct amdgpu_device *adev = m->private;
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uint32_t *mem = (uint32_t *)(adev->mes.event_log_cpu_addr);
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seq_hex_dump(m, "", DUMP_PREFIX_OFFSET, 32, 4,
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mem, PAGE_SIZE, false);
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return 0;
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}
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DEFINE_SHOW_ATTRIBUTE(amdgpu_debugfs_mes_event_log);
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#endif
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void amdgpu_debugfs_mes_event_log_init(struct amdgpu_device *adev)
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{
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#if defined(CONFIG_DEBUG_FS)
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struct drm_minor *minor = adev_to_drm(adev)->primary;
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struct dentry *root = minor->debugfs_root;
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debugfs_create_file("amdgpu_mes_event_log", 0444, root,
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adev, &amdgpu_debugfs_mes_event_log_fops);
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#endif
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}
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@ -133,6 +133,11 @@ struct amdgpu_mes {
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uint32_t num_mes_dbs;
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unsigned long *doorbell_bitmap;
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/* MES event log buffer */
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struct amdgpu_bo *event_log_gpu_obj;
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uint64_t event_log_gpu_addr;
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void *event_log_cpu_addr;
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/* ip specific functions */
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const struct amdgpu_mes_funcs *funcs;
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};
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