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drm/i915/vlv_dsi_pll: conversion to struct drm_device logging macros.
Convert the printk based logging macros to the new struct drm_device based logging macros in i915/display/vlv_dsi_pll.c using the following coccinelle script that matches based on the existence of a drm_i915_private device: @@ identifier fn, T; @@ fn(...) { ... struct drm_i915_private *T = ...; <+... ( -DRM_INFO( +drm_info(&T->drm, ...) | -DRM_ERROR( +drm_err(&T->drm, ...) | -DRM_WARN( +drm_warn(&T->drm, ...) | -DRM_DEBUG( +drm_dbg(&T->drm, ...) | -DRM_DEBUG_KMS( +drm_dbg_kms(&T->drm, ...) | -DRM_DEBUG_DRIVER( +drm_dbg(&T->drm, ...) | -DRM_DEBUG_ATOMIC( +drm_dbg_atomic(&T->drm, ...) ) ...+> } @@ identifier fn, T; @@ fn(...,struct drm_i915_private *T,...) { <+... ( -DRM_INFO( +drm_info(&T->drm, ...) | -DRM_ERROR( +drm_err(&T->drm, ...) | -DRM_WARN( +drm_warn(&T->drm, ...) | -DRM_DEBUG( +drm_dbg(&T->drm, ...) | -DRM_DEBUG_DRIVER( +drm_dbg(&T->drm, ...) | -DRM_DEBUG_KMS( +drm_dbg_kms(&T->drm, ...) | -DRM_DEBUG_ATOMIC( +drm_dbg_atomic(&T->drm, ...) ) ...+> } Checkpatch warnings were fixed manually. Signed-off-by: Wambui Karuga <wambui.karugax@gmail.com> Signed-off-by: Jani Nikula <jani.nikula@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20200130083229.12889-2-wambui.karugax@gmail.com
This commit is contained in:
parent
f4224a4cb1
commit
b2f7c0f1d8
1 changed files with 26 additions and 21 deletions
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@ -64,7 +64,7 @@ static int dsi_calc_mnp(struct drm_i915_private *dev_priv,
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/* target_dsi_clk is expected in kHz */
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/* target_dsi_clk is expected in kHz */
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if (target_dsi_clk < 300000 || target_dsi_clk > 1150000) {
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if (target_dsi_clk < 300000 || target_dsi_clk > 1150000) {
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DRM_ERROR("DSI CLK Out of Range\n");
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drm_err(&dev_priv->drm, "DSI CLK Out of Range\n");
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return -ECHRNG;
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return -ECHRNG;
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}
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}
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@ -126,7 +126,7 @@ int vlv_dsi_pll_compute(struct intel_encoder *encoder,
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ret = dsi_calc_mnp(dev_priv, config, dsi_clk);
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ret = dsi_calc_mnp(dev_priv, config, dsi_clk);
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if (ret) {
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if (ret) {
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DRM_DEBUG_KMS("dsi_calc_mnp failed\n");
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drm_dbg_kms(&dev_priv->drm, "dsi_calc_mnp failed\n");
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return ret;
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return ret;
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}
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}
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@ -138,7 +138,7 @@ int vlv_dsi_pll_compute(struct intel_encoder *encoder,
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config->dsi_pll.ctrl |= DSI_PLL_VCO_EN;
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config->dsi_pll.ctrl |= DSI_PLL_VCO_EN;
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DRM_DEBUG_KMS("dsi pll div %08x, ctrl %08x\n",
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drm_dbg_kms(&dev_priv->drm, "dsi pll div %08x, ctrl %08x\n",
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config->dsi_pll.div, config->dsi_pll.ctrl);
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config->dsi_pll.div, config->dsi_pll.ctrl);
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return 0;
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return 0;
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@ -149,7 +149,7 @@ void vlv_dsi_pll_enable(struct intel_encoder *encoder,
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{
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{
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struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
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struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
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DRM_DEBUG_KMS("\n");
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drm_dbg_kms(&dev_priv->drm, "\n");
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vlv_cck_get(dev_priv);
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vlv_cck_get(dev_priv);
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@ -169,12 +169,12 @@ void vlv_dsi_pll_enable(struct intel_encoder *encoder,
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DSI_PLL_LOCK, 20)) {
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DSI_PLL_LOCK, 20)) {
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vlv_cck_put(dev_priv);
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vlv_cck_put(dev_priv);
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DRM_ERROR("DSI PLL lock failed\n");
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drm_err(&dev_priv->drm, "DSI PLL lock failed\n");
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return;
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return;
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}
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}
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vlv_cck_put(dev_priv);
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vlv_cck_put(dev_priv);
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DRM_DEBUG_KMS("DSI PLL locked\n");
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drm_dbg_kms(&dev_priv->drm, "DSI PLL locked\n");
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}
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}
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void vlv_dsi_pll_disable(struct intel_encoder *encoder)
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void vlv_dsi_pll_disable(struct intel_encoder *encoder)
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@ -182,7 +182,7 @@ void vlv_dsi_pll_disable(struct intel_encoder *encoder)
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struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
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struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
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u32 tmp;
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u32 tmp;
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DRM_DEBUG_KMS("\n");
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drm_dbg_kms(&dev_priv->drm, "\n");
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vlv_cck_get(dev_priv);
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vlv_cck_get(dev_priv);
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@ -218,12 +218,14 @@ bool bxt_dsi_pll_is_enabled(struct drm_i915_private *dev_priv)
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val = intel_de_read(dev_priv, BXT_DSI_PLL_CTL);
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val = intel_de_read(dev_priv, BXT_DSI_PLL_CTL);
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if (IS_GEMINILAKE(dev_priv)) {
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if (IS_GEMINILAKE(dev_priv)) {
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if (!(val & BXT_DSIA_16X_MASK)) {
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if (!(val & BXT_DSIA_16X_MASK)) {
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DRM_DEBUG_DRIVER("Invalid PLL divider (%08x)\n", val);
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drm_dbg(&dev_priv->drm,
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"Invalid PLL divider (%08x)\n", val);
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enabled = false;
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enabled = false;
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}
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}
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} else {
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} else {
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if (!(val & BXT_DSIA_16X_MASK) || !(val & BXT_DSIC_16X_MASK)) {
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if (!(val & BXT_DSIA_16X_MASK) || !(val & BXT_DSIC_16X_MASK)) {
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DRM_DEBUG_DRIVER("Invalid PLL divider (%08x)\n", val);
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drm_dbg(&dev_priv->drm,
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"Invalid PLL divider (%08x)\n", val);
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enabled = false;
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enabled = false;
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}
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}
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}
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}
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@ -236,7 +238,7 @@ void bxt_dsi_pll_disable(struct intel_encoder *encoder)
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struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
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struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
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u32 val;
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u32 val;
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DRM_DEBUG_KMS("\n");
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drm_dbg_kms(&dev_priv->drm, "\n");
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val = intel_de_read(dev_priv, BXT_DSI_PLL_ENABLE);
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val = intel_de_read(dev_priv, BXT_DSI_PLL_ENABLE);
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val &= ~BXT_DSI_PLL_DO_ENABLE;
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val &= ~BXT_DSI_PLL_DO_ENABLE;
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@ -248,7 +250,8 @@ void bxt_dsi_pll_disable(struct intel_encoder *encoder)
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*/
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*/
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if (intel_de_wait_for_clear(dev_priv, BXT_DSI_PLL_ENABLE,
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if (intel_de_wait_for_clear(dev_priv, BXT_DSI_PLL_ENABLE,
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BXT_DSI_PLL_LOCKED, 1))
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BXT_DSI_PLL_LOCKED, 1))
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DRM_ERROR("Timeout waiting for PLL lock deassertion\n");
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drm_err(&dev_priv->drm,
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"Timeout waiting for PLL lock deassertion\n");
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}
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}
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u32 vlv_dsi_get_pclk(struct intel_encoder *encoder,
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u32 vlv_dsi_get_pclk(struct intel_encoder *encoder,
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@ -263,7 +266,7 @@ u32 vlv_dsi_get_pclk(struct intel_encoder *encoder,
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int refclk = IS_CHERRYVIEW(dev_priv) ? 100000 : 25000;
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int refclk = IS_CHERRYVIEW(dev_priv) ? 100000 : 25000;
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int i;
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int i;
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DRM_DEBUG_KMS("\n");
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drm_dbg_kms(&dev_priv->drm, "\n");
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vlv_cck_get(dev_priv);
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vlv_cck_get(dev_priv);
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pll_ctl = vlv_cck_read(dev_priv, CCK_REG_DSI_PLL_CONTROL);
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pll_ctl = vlv_cck_read(dev_priv, CCK_REG_DSI_PLL_CONTROL);
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@ -292,7 +295,7 @@ u32 vlv_dsi_get_pclk(struct intel_encoder *encoder,
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p--;
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p--;
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if (!p) {
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if (!p) {
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DRM_ERROR("wrong P1 divisor\n");
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drm_err(&dev_priv->drm, "wrong P1 divisor\n");
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return 0;
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return 0;
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}
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}
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@ -302,7 +305,7 @@ u32 vlv_dsi_get_pclk(struct intel_encoder *encoder,
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}
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}
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if (i == ARRAY_SIZE(lfsr_converts)) {
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if (i == ARRAY_SIZE(lfsr_converts)) {
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DRM_ERROR("wrong m_seed programmed\n");
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drm_err(&dev_priv->drm, "wrong m_seed programmed\n");
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return 0;
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return 0;
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}
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}
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@ -333,7 +336,7 @@ u32 bxt_dsi_get_pclk(struct intel_encoder *encoder,
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pclk = DIV_ROUND_CLOSEST(dsi_clk * intel_dsi->lane_count, bpp);
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pclk = DIV_ROUND_CLOSEST(dsi_clk * intel_dsi->lane_count, bpp);
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DRM_DEBUG_DRIVER("Calculated pclk=%u\n", pclk);
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drm_dbg(&dev_priv->drm, "Calculated pclk=%u\n", pclk);
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return pclk;
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return pclk;
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}
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}
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@ -479,10 +482,11 @@ int bxt_dsi_pll_compute(struct intel_encoder *encoder,
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}
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}
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if (dsi_ratio < dsi_ratio_min || dsi_ratio > dsi_ratio_max) {
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if (dsi_ratio < dsi_ratio_min || dsi_ratio > dsi_ratio_max) {
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DRM_ERROR("Cant get a suitable ratio from DSI PLL ratios\n");
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drm_err(&dev_priv->drm,
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"Cant get a suitable ratio from DSI PLL ratios\n");
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return -ECHRNG;
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return -ECHRNG;
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} else
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} else
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DRM_DEBUG_KMS("DSI PLL calculation is Done!!\n");
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drm_dbg_kms(&dev_priv->drm, "DSI PLL calculation is Done!!\n");
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/*
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/*
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* Program DSI ratio and Select MIPIC and MIPIA PLL output as 8x
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* Program DSI ratio and Select MIPIC and MIPIA PLL output as 8x
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@ -508,7 +512,7 @@ void bxt_dsi_pll_enable(struct intel_encoder *encoder,
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enum port port;
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enum port port;
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u32 val;
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u32 val;
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DRM_DEBUG_KMS("\n");
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drm_dbg_kms(&dev_priv->drm, "\n");
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/* Configure PLL vales */
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/* Configure PLL vales */
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intel_de_write(dev_priv, BXT_DSI_PLL_CTL, config->dsi_pll.ctrl);
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intel_de_write(dev_priv, BXT_DSI_PLL_CTL, config->dsi_pll.ctrl);
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@ -530,11 +534,12 @@ void bxt_dsi_pll_enable(struct intel_encoder *encoder,
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/* Timeout and fail if PLL not locked */
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/* Timeout and fail if PLL not locked */
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if (intel_de_wait_for_set(dev_priv, BXT_DSI_PLL_ENABLE,
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if (intel_de_wait_for_set(dev_priv, BXT_DSI_PLL_ENABLE,
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BXT_DSI_PLL_LOCKED, 1)) {
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BXT_DSI_PLL_LOCKED, 1)) {
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DRM_ERROR("Timed out waiting for DSI PLL to lock\n");
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drm_err(&dev_priv->drm,
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"Timed out waiting for DSI PLL to lock\n");
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return;
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return;
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}
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}
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DRM_DEBUG_KMS("DSI PLL locked\n");
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drm_dbg_kms(&dev_priv->drm, "DSI PLL locked\n");
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}
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}
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void bxt_dsi_reset_clocks(struct intel_encoder *encoder, enum port port)
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void bxt_dsi_reset_clocks(struct intel_encoder *encoder, enum port port)
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