iommu/vt-d: Make size of operands same in bitwise operations

This addresses the following issue reported by klocwork tool:

 - operands of different size in bitwise operations

Suggested-by: Yongwei Ma <yongwei.ma@intel.com>
Signed-off-by: Tina Zhang <tina.zhang@intel.com>
Link: https://lore.kernel.org/r/20230406065944.2773296-2-tina.zhang@intel.com
Signed-off-by: Lu Baolu <baolu.lu@linux.intel.com>
Signed-off-by: Joerg Roedel <jroedel@suse.de>
This commit is contained in:
Tina Zhang 2023-04-13 12:06:39 +08:00 committed by Joerg Roedel
parent 113a031bec
commit b31064f881
2 changed files with 3 additions and 3 deletions

View file

@ -1689,7 +1689,7 @@ static void __dmar_enable_qi(struct intel_iommu *iommu)
* is present.
*/
if (ecap_smts(iommu->ecap))
val |= (1 << 11) | 1;
val |= BIT_ULL(11) | BIT_ULL(0);
raw_spin_lock_irqsave(&iommu->register_lock, flags);

View file

@ -1870,7 +1870,7 @@ context_set_sm_rid2pasid(struct context_entry *context, unsigned long pasid)
*/
static inline void context_set_sm_dte(struct context_entry *context)
{
context->lo |= (1 << 2);
context->lo |= BIT_ULL(2);
}
/*
@ -1879,7 +1879,7 @@ static inline void context_set_sm_dte(struct context_entry *context)
*/
static inline void context_set_sm_pre(struct context_entry *context)
{
context->lo |= (1 << 4);
context->lo |= BIT_ULL(4);
}
/* Convert value to context PASID directory size field coding. */