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Code Issues Releases Wiki Activity

pcmcia: fix Alchemy warnings

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Fix the following warnings:

drivers/pcmcia/au1000_generic.c: In function `au1x00_pcmcia_socket_probe':
drivers/pcmcia/au1000_generic.c:405: warning: integer constant is too large for
"long" type
drivers/pcmcia/au1000_generic.c:413: warning: integer constant is too large for
"long" type

by properly postfixing the socket constants. While at it, fix the lines over 80
characters long in the vicinity...

Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com>
Acked-by: Ralf Baechle <ralf@linux-mips.org>
Signed-off-by: Dominik Brodowski <linux@dominikbrodowski.net>
This commit is contained in:
Sergei Shtylyov 2008-04-14 17:27:30 +04:00 committed by Dominik Brodowski
parent f36fe2b90f
commit b3363997a6
1 changed files with 15 additions and 11 deletions
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26
drivers/pcmcia/au1000_generic.h
View file

@ -34,9 +34,9 @@
#define AU1000_PCMCIA_IO_SPEED (255) #define AU1000_PCMCIA_IO_SPEED (255)
#define AU1000_PCMCIA_MEM_SPEED (300) #define AU1000_PCMCIA_MEM_SPEED (300)
#define AU1X_SOCK0_IO 0xF00000000 #define AU1X_SOCK0_IO 0xF00000000ULL
#define AU1X_SOCK0_PHYS_ATTR 0xF40000000 #define AU1X_SOCK0_PHYS_ATTR 0xF40000000ULL
#define AU1X_SOCK0_PHYS_MEM 0xF80000000 #define AU1X_SOCK0_PHYS_MEM 0xF80000000ULL
/* pseudo 32 bit phys addresses, which get fixed up to the /* pseudo 32 bit phys addresses, which get fixed up to the
* real 36 bit address in fixup_bigphys_addr() */ * real 36 bit address in fixup_bigphys_addr() */
#define AU1X_SOCK0_PSEUDO_PHYS_ATTR 0xF4000000 #define AU1X_SOCK0_PSEUDO_PHYS_ATTR 0xF4000000
@ -45,16 +45,20 @@
/* pcmcia socket 1 needs external glue logic so the memory map /* pcmcia socket 1 needs external glue logic so the memory map
* differs from board to board. * differs from board to board.
*/ */
#if defined(CONFIG_MIPS_PB1000) || defined(CONFIG_MIPS_PB1100) || defined(CONFIG_MIPS_PB1500) || defined(CONFIG_MIPS_PB1550) || defined(CONFIG_MIPS_PB1200) #if defined(CONFIG_MIPS_PB1000) || defined(CONFIG_MIPS_PB1100) || \
#define AU1X_SOCK1_IO 0xF08000000 defined(CONFIG_MIPS_PB1500) || defined(CONFIG_MIPS_PB1550) || \
#define AU1X_SOCK1_PHYS_ATTR 0xF48000000 defined(CONFIG_MIPS_PB1200)
#define AU1X_SOCK1_PHYS_MEM 0xF88000000 #define AU1X_SOCK1_IO 0xF08000000ULL
#define AU1X_SOCK1_PHYS_ATTR 0xF48000000ULL
#define AU1X_SOCK1_PHYS_MEM 0xF88000000ULL
#define AU1X_SOCK1_PSEUDO_PHYS_ATTR 0xF4800000 #define AU1X_SOCK1_PSEUDO_PHYS_ATTR 0xF4800000
#define AU1X_SOCK1_PSEUDO_PHYS_MEM 0xF8800000 #define AU1X_SOCK1_PSEUDO_PHYS_MEM 0xF8800000
#elif defined(CONFIG_MIPS_DB1000) || defined(CONFIG_MIPS_DB1100) || defined(CONFIG_MIPS_DB1500) || defined(CONFIG_MIPS_DB1550) || defined(CONFIG_MIPS_DB1200) #elif defined(CONFIG_MIPS_DB1000) || defined(CONFIG_MIPS_DB1100) || \
#define AU1X_SOCK1_IO 0xF04000000 defined(CONFIG_MIPS_DB1500) || defined(CONFIG_MIPS_DB1550) || \
#define AU1X_SOCK1_PHYS_ATTR 0xF44000000 defined(CONFIG_MIPS_DB1200)
#define AU1X_SOCK1_PHYS_MEM 0xF84000000 #define AU1X_SOCK1_IO 0xF04000000ULL
#define AU1X_SOCK1_PHYS_ATTR 0xF44000000ULL
#define AU1X_SOCK1_PHYS_MEM 0xF84000000ULL
#define AU1X_SOCK1_PSEUDO_PHYS_ATTR 0xF4400000 #define AU1X_SOCK1_PSEUDO_PHYS_ATTR 0xF4400000
#define AU1X_SOCK1_PSEUDO_PHYS_MEM 0xF8400000 #define AU1X_SOCK1_PSEUDO_PHYS_MEM 0xF8400000
#endif #endif