locking, arch/ia64: Reduce <asm/smp.h> header dependencies by moving XTP bits into the new <asm/xtp.h> header

We want to remove the #include <asm/io.h> from <asm/smp.h>, but for this
we have to move the XTP bits into a separate header first (as these bits
rely on <asm/io.h> definitions), and include them in the .c files that rely
on those APIs.

Co-developed-by: Ingo Molnar <mingo@kernel.org>
Signed-off-by: Peter Zijlstra <peterz@infradead.org>
Signed-off-by: Ingo Molnar <mingo@kernel.org>
This commit is contained in:
Peter Zijlstra 2020-08-06 14:36:20 +02:00 committed by Ingo Molnar
parent 13c01139b1
commit b3545192e2
9 changed files with 53 additions and 35 deletions

View file

@ -18,7 +18,6 @@
#include <linux/bitops.h>
#include <linux/irqreturn.h>
#include <asm/io.h>
#include <asm/param.h>
#include <asm/processor.h>
#include <asm/ptrace.h>
@ -44,11 +43,6 @@ ia64_get_lid (void)
#ifdef CONFIG_SMP
#define XTP_OFFSET 0x1e0008
#define SMP_IRQ_REDIRECTION (1 << 0)
#define SMP_IPI_REDIRECTION (1 << 1)
#define raw_smp_processor_id() (current_thread_info()->cpu)
extern struct smp_boot_data {
@ -62,7 +56,6 @@ extern cpumask_t cpu_core_map[NR_CPUS];
DECLARE_PER_CPU_SHARED_ALIGNED(cpumask_t, cpu_sibling_map);
extern int smp_num_siblings;
extern void __iomem *ipi_base_addr;
extern unsigned char smp_int_redirect;
extern volatile int ia64_cpu_to_sapicid[];
#define cpu_physical_id(i) ia64_cpu_to_sapicid[i]
@ -84,34 +77,6 @@ cpu_logical_id (int cpuid)
return i;
}
/*
* XTP control functions:
* min_xtp : route all interrupts to this CPU
* normal_xtp: nominal XTP value
* max_xtp : never deliver interrupts to this CPU.
*/
static inline void
min_xtp (void)
{
if (smp_int_redirect & SMP_IRQ_REDIRECTION)
writeb(0x00, ipi_base_addr + XTP_OFFSET); /* XTP to min */
}
static inline void
normal_xtp (void)
{
if (smp_int_redirect & SMP_IRQ_REDIRECTION)
writeb(0x08, ipi_base_addr + XTP_OFFSET); /* XTP normal */
}
static inline void
max_xtp (void)
{
if (smp_int_redirect & SMP_IRQ_REDIRECTION)
writeb(0x0f, ipi_base_addr + XTP_OFFSET); /* Set XTP to max */
}
/* Upping and downing of CPUs */
extern int __cpu_disable (void);
extern void __cpu_die (unsigned int cpu);

View file

@ -0,0 +1,46 @@
/* SPDX-License-Identifier: GPL-2.0 */
#ifndef _ASM_IA64_XTP_H
#define _ASM_IA64_XTP_H
#include <asm/io.h>
#ifdef CONFIG_SMP
#define XTP_OFFSET 0x1e0008
#define SMP_IRQ_REDIRECTION (1 << 0)
#define SMP_IPI_REDIRECTION (1 << 1)
extern unsigned char smp_int_redirect;
/*
* XTP control functions:
* min_xtp : route all interrupts to this CPU
* normal_xtp: nominal XTP value
* max_xtp : never deliver interrupts to this CPU.
*/
static inline void
min_xtp (void)
{
if (smp_int_redirect & SMP_IRQ_REDIRECTION)
writeb(0x00, ipi_base_addr + XTP_OFFSET); /* XTP to min */
}
static inline void
normal_xtp (void)
{
if (smp_int_redirect & SMP_IRQ_REDIRECTION)
writeb(0x08, ipi_base_addr + XTP_OFFSET); /* XTP normal */
}
static inline void
max_xtp (void)
{
if (smp_int_redirect & SMP_IRQ_REDIRECTION)
writeb(0x0f, ipi_base_addr + XTP_OFFSET); /* Set XTP to max */
}
#endif /* CONFIG_SMP */
#endif /* _ASM_IA64_XTP_Hy */

View file

@ -95,6 +95,7 @@
#include <asm/iosapic.h>
#include <asm/processor.h>
#include <asm/ptrace.h>
#include <asm/xtp.h>
#undef DEBUG_INTERRUPT_ROUTING

View file

@ -25,6 +25,7 @@
#include <linux/kernel_stat.h>
#include <asm/mca.h>
#include <asm/xtp.h>
/*
* 'what should we do if we get a hw irq event on an illegal vector'.

View file

@ -48,6 +48,7 @@
#include <linux/uaccess.h>
#include <asm/unwind.h>
#include <asm/user.h>
#include <asm/xtp.h>
#include "entry.h"

View file

@ -18,6 +18,7 @@
#include <asm/page.h>
#include <asm/sal.h>
#include <asm/pal.h>
#include <asm/xtp.h>
__cacheline_aligned DEFINE_SPINLOCK(sal_lock);
unsigned long sal_platform_features;

View file

@ -65,6 +65,7 @@
#include <asm/tlbflush.h>
#include <asm/unistd.h>
#include <asm/uv/uv.h>
#include <asm/xtp.h>
#if defined(CONFIG_SMP) && (IA64_CPU_SIZE > PAGE_SIZE)
# error "struct cpuinfo_ia64 too big!"

View file

@ -46,6 +46,7 @@
#include <asm/tlbflush.h>
#include <asm/unistd.h>
#include <asm/mca.h>
#include <asm/xtp.h>
/*
* Note: alignment of 4 entries/cacheline was empirically determined

View file

@ -7,6 +7,7 @@
#ifndef _ASMPARISC_TIMEX_H
#define _ASMPARISC_TIMEX_H
#include <asm/special_insns.h>
#define CLOCK_TICK_RATE 1193180 /* Underlying HZ */