ASoC: jz4740-i2s: Remove .set_sysclk() & friends

Merge series from Aidan MacDonald <aidanmacdonald.0x0@gmail.com>:

A quick series to get rid of .set_sysclk() from jz4740-i2s.
It wasn't used in practice so this shouldn't be troublesome for anyone,
and fortunately there aren't any backward compatibility concerns.

The actual rationale for removing it, as opposed to fixing the
issues of the current DT bindings and implementation, is provided
in the dt-bindings patch.
This commit is contained in:
Mark Brown 2022-10-31 18:48:38 +00:00
commit b3d2170916
No known key found for this signature in database
GPG key ID: 24D68B725D5487D0
3 changed files with 2 additions and 50 deletions

View file

@ -37,15 +37,11 @@ properties:
items:
- description: AIC clock
- description: I2S clock
- description: EXT clock
- description: PLL/2 clock
clock-names:
items:
- const: aic
- const: i2s
- const: ext
- const: pll half
dmas:
items:
@ -82,10 +78,8 @@ examples:
interrupts = <18>;
clocks = <&cgu JZ4740_CLK_AIC>,
<&cgu JZ4740_CLK_I2S>,
<&cgu JZ4740_CLK_EXT>,
<&cgu JZ4740_CLK_PLL_HALF>;
clock-names = "aic", "i2s", "ext", "pll half";
<&cgu JZ4740_CLK_I2S>;
clock-names = "aic", "i2s";
dmas = <&dmac 25 0xffffffff>, <&dmac 24 0xffffffff>;
dma-names = "rx", "tx";

View file

@ -23,8 +23,6 @@
#include <sound/initval.h>
#include <sound/dmaengine_pcm.h>
#include "jz4740-i2s.h"
#define JZ_REG_AIC_CONF 0x00
#define JZ_REG_AIC_CTRL 0x04
#define JZ_REG_AIC_I2S_FMT 0x10
@ -273,35 +271,6 @@ static int jz4740_i2s_hw_params(struct snd_pcm_substream *substream,
return 0;
}
static int jz4740_i2s_set_sysclk(struct snd_soc_dai *dai, int clk_id,
unsigned int freq, int dir)
{
struct jz4740_i2s *i2s = snd_soc_dai_get_drvdata(dai);
struct clk *parent;
int ret = 0;
switch (clk_id) {
case JZ4740_I2S_CLKSRC_EXT:
parent = clk_get(NULL, "ext");
if (IS_ERR(parent))
return PTR_ERR(parent);
clk_set_parent(i2s->clk_i2s, parent);
break;
case JZ4740_I2S_CLKSRC_PLL:
parent = clk_get(NULL, "pll half");
if (IS_ERR(parent))
return PTR_ERR(parent);
clk_set_parent(i2s->clk_i2s, parent);
ret = clk_set_rate(i2s->clk_i2s, freq);
break;
default:
return -EINVAL;
}
clk_put(parent);
return ret;
}
static int jz4740_i2s_dai_probe(struct snd_soc_dai *dai)
{
struct jz4740_i2s *i2s = snd_soc_dai_get_drvdata(dai);
@ -318,7 +287,6 @@ static const struct snd_soc_dai_ops jz4740_i2s_dai_ops = {
.trigger = jz4740_i2s_trigger,
.hw_params = jz4740_i2s_hw_params,
.set_fmt = jz4740_i2s_set_fmt,
.set_sysclk = jz4740_i2s_set_sysclk,
};
#define JZ4740_I2S_FMTS (SNDRV_PCM_FMTBIT_S8 | \

View file

@ -1,10 +0,0 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#ifndef _JZ4740_I2S_H
#define _JZ4740_I2S_H
/* I2S clock source */
#define JZ4740_I2S_CLKSRC_EXT 0
#define JZ4740_I2S_CLKSRC_PLL 1
#endif