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arm64: dts: qcom: sm6115: Hook up interconnects
Add interconnect provider nodes and hook up interconnects to consumer devices, including bwmon. Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Link: https://lore.kernel.org/r/20231209-topic-6115iccdt-v1-2-f62da62b7276@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
This commit is contained in:
Konrad Dybcio
Bjorn Andersson
parent
ea0b1a4c5a
commit
b3eaa47395
1 changed files with 277 additions and 0 deletions
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@ -10,6 +10,8 @@
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#include <dt-bindings/dma/qcom-gpi.h>
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#include <dt-bindings/firmware/qcom,scm.h>
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/interconnect/qcom,rpm-icc.h>
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#include <dt-bindings/interconnect/qcom,sm6115.h>
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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#include <dt-bindings/power/qcom-rpmpd.h>
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@ -264,6 +266,8 @@ firmware {
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scm: scm {
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compatible = "qcom,scm-sm6115", "qcom,scm";
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#reset-cells = <1>;
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interconnects = <&system_noc MASTER_CRYPTO_CORE0 RPM_ALWAYS_TAG
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&bimc SLAVE_EBI_CH0 RPM_ALWAYS_TAG>;
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};
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};
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@ -878,6 +882,43 @@ usb_qmpphy: phy@1615000 {
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status = "disabled";
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};
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system_noc: interconnect@1880000 {
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compatible = "qcom,sm6115-snoc";
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reg = <0x0 0x01880000 0x0 0x5f080>;
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clocks = <&gcc GCC_SYS_NOC_CPUSS_AHB_CLK>,
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<&gcc GCC_SYS_NOC_UFS_PHY_AXI_CLK>,
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<&gcc GCC_SYS_NOC_USB3_PRIM_AXI_CLK>,
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<&rpmcc RPM_SMD_IPA_CLK>;
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clock-names = "cpu_axi",
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"ufs_axi",
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"usb_axi",
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"ipa";
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#interconnect-cells = <2>;
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clk_virt: interconnect-clk {
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compatible = "qcom,sm6115-clk-virt";
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#interconnect-cells = <2>;
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};
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mmrt_virt: interconnect-mmrt {
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compatible = "qcom,sm6115-mmrt-virt";
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#interconnect-cells = <2>;
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};
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mmnrt_virt: interconnect-mmnrt {
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compatible = "qcom,sm6115-mmnrt-virt";
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#interconnect-cells = <2>;
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};
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};
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config_noc: interconnect@1900000 {
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compatible = "qcom,sm6115-cnoc";
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reg = <0x0 0x01900000 0x0 0x6200>;
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clocks = <&gcc GCC_CFG_NOC_USB3_PRIM_AXI_CLK>;
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clock-names = "usb_axi";
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#interconnect-cells = <2>;
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};
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qfprom@1b40000 {
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compatible = "qcom,sm6115-qfprom", "qcom,qfprom";
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reg = <0x0 0x01b40000 0x0 0x7000>;
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@ -902,6 +943,60 @@ rng: rng@1b53000 {
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clock-names = "core";
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};
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pmu@1b8e300 {
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compatible = "qcom,sm6115-cpu-bwmon", "qcom,sdm845-bwmon";
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reg = <0x0 0x01b8e300 0x0 0x600>;
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interrupts = <GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH>;
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operating-points-v2 = <&cpu_bwmon_opp_table>;
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interconnects = <&bimc MASTER_AMPSS_M0 RPM_ACTIVE_TAG
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&bimc SLAVE_EBI_CH0 RPM_ACTIVE_TAG>;
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cpu_bwmon_opp_table: opp-table {
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compatible = "operating-points-v2";
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opp-0 {
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opp-peak-kBps = <(200 * 4 * 1000)>;
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};
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opp-1 {
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opp-peak-kBps = <(300 * 4 * 1000)>;
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};
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opp-2 {
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opp-peak-kBps = <(451 * 4 * 1000)>;
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};
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opp-3 {
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opp-peak-kBps = <(547 * 4 * 1000)>;
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};
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opp-4 {
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opp-peak-kBps = <(681 * 4 * 1000)>;
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};
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opp-5 {
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opp-peak-kBps = <(768 * 4 * 1000)>;
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};
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opp-6 {
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opp-peak-kBps = <(1017 * 4 * 1000)>;
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};
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opp-7 {
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opp-peak-kBps = <(1353 * 4 * 1000)>;
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};
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opp-8 {
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opp-peak-kBps = <(1555 * 4 * 1000)>;
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};
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opp-9 {
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opp-peak-kBps = <(1804 * 4 * 1000)>;
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};
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};
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};
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spmi_bus: spmi@1c40000 {
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compatible = "qcom,spmi-pmic-arb";
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reg = <0x0 0x01c40000 0x0 0x1100>,
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@ -931,6 +1026,12 @@ tsens0: thermal-sensor@4411000 {
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#thermal-sensor-cells = <1>;
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};
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bimc: interconnect@4480000 {
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compatible = "qcom,sm6115-bimc";
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reg = <0x0 0x04480000 0x0 0x80000>;
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#interconnect-cells = <2>;
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};
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rpm_msg_ram: sram@45f0000 {
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compatible = "qcom,rpm-msg-ram";
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reg = <0x0 0x045f0000 0x0 0x7000>;
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@ -958,8 +1059,42 @@ sdhc_1: mmc@4744000 {
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<&gcc GCC_SDCC1_ICE_CORE_CLK>;
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clock-names = "iface", "core", "xo", "ice";
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power-domains = <&rpmpd SM6115_VDDCX>;
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operating-points-v2 = <&sdhc1_opp_table>;
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interconnects = <&system_noc MASTER_SDCC_1 RPM_ALWAYS_TAG
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&bimc SLAVE_EBI_CH0 RPM_ALWAYS_TAG>,
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<&bimc MASTER_AMPSS_M0 RPM_ALWAYS_TAG
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&config_noc SLAVE_SDCC_1 RPM_ALWAYS_TAG>;
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interconnect-names = "sdhc-ddr",
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"cpu-sdhc";
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bus-width = <8>;
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status = "disabled";
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sdhc1_opp_table: opp-table {
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compatible = "operating-points-v2";
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opp-100000000 {
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opp-hz = /bits/ 64 <100000000>;
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required-opps = <&rpmpd_opp_low_svs>;
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opp-peak-kBps = <250000 133320>;
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opp-avg-kBps = <102400 65000>;
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};
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opp-192000000 {
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opp-hz = /bits/ 64 <192000000>;
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required-opps = <&rpmpd_opp_low_svs>;
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opp-peak-kBps = <800000 300000>;
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opp-avg-kBps = <204800 200000>;
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};
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opp-384000000 {
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opp-hz = /bits/ 64 <384000000>;
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required-opps = <&rpmpd_opp_svs_plus>;
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opp-peak-kBps = <800000 300000>;
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opp-avg-kBps = <204800 200000>;
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};
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};
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};
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sdhc_2: mmc@4784000 {
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@ -980,6 +1115,12 @@ sdhc_2: mmc@4784000 {
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operating-points-v2 = <&sdhc2_opp_table>;
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iommus = <&apps_smmu 0x00a0 0x0>;
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resets = <&gcc GCC_SDCC2_BCR>;
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interconnects = <&system_noc MASTER_SDCC_2 RPM_ALWAYS_TAG
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&bimc SLAVE_EBI_CH0 RPM_ALWAYS_TAG>,
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<&bimc MASTER_AMPSS_M0 RPM_ALWAYS_TAG
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&config_noc SLAVE_SDCC_2 RPM_ALWAYS_TAG>;
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interconnect-names = "sdhc-ddr",
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"cpu-sdhc";
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bus-width = <4>;
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qcom,dll-config = <0x0007642c>;
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@ -992,11 +1133,15 @@ sdhc2_opp_table: opp-table {
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opp-100000000 {
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opp-hz = /bits/ 64 <100000000>;
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required-opps = <&rpmpd_opp_low_svs>;
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opp-peak-kBps = <250000 133320>;
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opp-avg-kBps = <261438 150000>;
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};
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opp-202000000 {
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opp-hz = /bits/ 64 <202000000>;
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required-opps = <&rpmpd_opp_nom>;
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opp-peak-kBps = <800000 300000>;
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opp-avg-kBps = <261438 300000>;
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};
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};
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};
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@ -1103,6 +1248,15 @@ i2c0: i2c@4a80000 {
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dmas = <&gpi_dma0 0 0 QCOM_GPI_I2C>,
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<&gpi_dma0 1 0 QCOM_GPI_I2C>;
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dma-names = "tx", "rx";
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interconnects = <&clk_virt MASTER_QUP_CORE_0 RPM_ALWAYS_TAG
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&clk_virt SLAVE_QUP_CORE_0 RPM_ALWAYS_TAG>,
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<&bimc MASTER_AMPSS_M0 RPM_ALWAYS_TAG
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&config_noc SLAVE_QUP_0 RPM_ALWAYS_TAG>,
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<&system_noc MASTER_QUP_0 RPM_ALWAYS_TAG
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&bimc SLAVE_EBI_CH0 RPM_ALWAYS_TAG>;
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interconnect-names = "qup-core",
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"qup-config",
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"qup-memory";
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#address-cells = <1>;
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#size-cells = <0>;
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status = "disabled";
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@ -1119,6 +1273,15 @@ spi0: spi@4a80000 {
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dmas = <&gpi_dma0 0 0 QCOM_GPI_SPI>,
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<&gpi_dma0 1 0 QCOM_GPI_SPI>;
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dma-names = "tx", "rx";
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interconnects = <&clk_virt MASTER_QUP_CORE_0 RPM_ALWAYS_TAG
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&clk_virt SLAVE_QUP_CORE_0 RPM_ALWAYS_TAG>,
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<&bimc MASTER_AMPSS_M0 RPM_ALWAYS_TAG
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&config_noc SLAVE_QUP_0 RPM_ALWAYS_TAG>,
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<&system_noc MASTER_QUP_0 RPM_ALWAYS_TAG
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&bimc SLAVE_EBI_CH0 RPM_ALWAYS_TAG>;
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interconnect-names = "qup-core",
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"qup-config",
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"qup-memory";
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#address-cells = <1>;
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#size-cells = <0>;
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status = "disabled";
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@ -1135,6 +1298,12 @@ i2c1: i2c@4a84000 {
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dmas = <&gpi_dma0 0 1 QCOM_GPI_I2C>,
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<&gpi_dma0 1 1 QCOM_GPI_I2C>;
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dma-names = "tx", "rx";
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interconnects = <&clk_virt MASTER_QUP_CORE_0 RPM_ALWAYS_TAG
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&clk_virt SLAVE_QUP_CORE_0 RPM_ALWAYS_TAG>,
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<&bimc MASTER_AMPSS_M0 RPM_ALWAYS_TAG
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&config_noc SLAVE_QUP_0 RPM_ALWAYS_TAG>,
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<&system_noc MASTER_QUP_0 RPM_ALWAYS_TAG
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&bimc SLAVE_EBI_CH0 RPM_ALWAYS_TAG>;
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#address-cells = <1>;
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#size-cells = <0>;
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status = "disabled";
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@ -1151,6 +1320,15 @@ spi1: spi@4a84000 {
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dmas = <&gpi_dma0 0 1 QCOM_GPI_SPI>,
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<&gpi_dma0 1 1 QCOM_GPI_SPI>;
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dma-names = "tx", "rx";
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interconnects = <&clk_virt MASTER_QUP_CORE_0 RPM_ALWAYS_TAG
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&clk_virt SLAVE_QUP_CORE_0 RPM_ALWAYS_TAG>,
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<&bimc MASTER_AMPSS_M0 RPM_ALWAYS_TAG
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&config_noc SLAVE_QUP_0 RPM_ALWAYS_TAG>,
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<&system_noc MASTER_QUP_0 RPM_ALWAYS_TAG
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&bimc SLAVE_EBI_CH0 RPM_ALWAYS_TAG>;
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interconnect-names = "qup-core",
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"qup-config",
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"qup-memory";
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#address-cells = <1>;
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#size-cells = <0>;
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status = "disabled";
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@ -1167,6 +1345,15 @@ i2c2: i2c@4a88000 {
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dmas = <&gpi_dma0 0 2 QCOM_GPI_I2C>,
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<&gpi_dma0 1 2 QCOM_GPI_I2C>;
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dma-names = "tx", "rx";
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interconnects = <&clk_virt MASTER_QUP_CORE_0 RPM_ALWAYS_TAG
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&clk_virt SLAVE_QUP_CORE_0 RPM_ALWAYS_TAG>,
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<&bimc MASTER_AMPSS_M0 RPM_ALWAYS_TAG
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&config_noc SLAVE_QUP_0 RPM_ALWAYS_TAG>,
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<&system_noc MASTER_QUP_0 RPM_ALWAYS_TAG
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&bimc SLAVE_EBI_CH0 RPM_ALWAYS_TAG>;
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interconnect-names = "qup-core",
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"qup-config",
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"qup-memory";
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#address-cells = <1>;
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#size-cells = <0>;
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status = "disabled";
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@ -1183,6 +1370,15 @@ spi2: spi@4a88000 {
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dmas = <&gpi_dma0 0 2 QCOM_GPI_SPI>,
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<&gpi_dma0 1 2 QCOM_GPI_SPI>;
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dma-names = "tx", "rx";
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interconnects = <&clk_virt MASTER_QUP_CORE_0 RPM_ALWAYS_TAG
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&clk_virt SLAVE_QUP_CORE_0 RPM_ALWAYS_TAG>,
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<&bimc MASTER_AMPSS_M0 RPM_ALWAYS_TAG
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&config_noc SLAVE_QUP_0 RPM_ALWAYS_TAG>,
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<&system_noc MASTER_QUP_0 RPM_ALWAYS_TAG
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&bimc SLAVE_EBI_CH0 RPM_ALWAYS_TAG>;
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interconnect-names = "qup-core",
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"qup-config",
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"qup-memory";
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#address-cells = <1>;
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#size-cells = <0>;
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status = "disabled";
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@ -1199,6 +1395,15 @@ i2c3: i2c@4a8c000 {
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dmas = <&gpi_dma0 0 3 QCOM_GPI_I2C>,
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<&gpi_dma0 1 3 QCOM_GPI_I2C>;
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dma-names = "tx", "rx";
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interconnects = <&clk_virt MASTER_QUP_CORE_0 RPM_ALWAYS_TAG
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&clk_virt SLAVE_QUP_CORE_0 RPM_ALWAYS_TAG>,
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<&bimc MASTER_AMPSS_M0 RPM_ALWAYS_TAG
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&config_noc SLAVE_QUP_0 RPM_ALWAYS_TAG>,
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<&system_noc MASTER_QUP_0 RPM_ALWAYS_TAG
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&bimc SLAVE_EBI_CH0 RPM_ALWAYS_TAG>;
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interconnect-names = "qup-core",
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"qup-config",
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"qup-memory";
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#address-cells = <1>;
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#size-cells = <0>;
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status = "disabled";
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@ -1215,6 +1420,15 @@ spi3: spi@4a8c000 {
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dmas = <&gpi_dma0 0 3 QCOM_GPI_SPI>,
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<&gpi_dma0 1 3 QCOM_GPI_SPI>;
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dma-names = "tx", "rx";
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interconnects = <&clk_virt MASTER_QUP_CORE_0 RPM_ALWAYS_TAG
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&clk_virt SLAVE_QUP_CORE_0 RPM_ALWAYS_TAG>,
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<&bimc MASTER_AMPSS_M0 RPM_ALWAYS_TAG
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&config_noc SLAVE_QUP_0 RPM_ALWAYS_TAG>,
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<&system_noc MASTER_QUP_0 RPM_ALWAYS_TAG
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&bimc SLAVE_EBI_CH0 RPM_ALWAYS_TAG>;
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interconnect-names = "qup-core",
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"qup-config",
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"qup-memory";
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#address-cells = <1>;
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#size-cells = <0>;
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status = "disabled";
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@ -1228,6 +1442,12 @@ uart3: serial@4a8c000 {
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clock-names = "se";
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power-domains = <&rpmpd SM6115_VDDCX>;
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operating-points-v2 = <&qup_opp_table>;
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interconnects = <&clk_virt MASTER_QUP_CORE_0 RPM_ALWAYS_TAG
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&clk_virt SLAVE_QUP_CORE_0 RPM_ALWAYS_TAG>,
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<&bimc MASTER_AMPSS_M0 RPM_ALWAYS_TAG
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&config_noc SLAVE_QUP_0 RPM_ALWAYS_TAG>;
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interconnect-names = "qup-core",
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"qup-config";
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status = "disabled";
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};
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@ -1242,6 +1462,15 @@ i2c4: i2c@4a90000 {
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dmas = <&gpi_dma0 0 4 QCOM_GPI_I2C>,
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<&gpi_dma0 1 4 QCOM_GPI_I2C>;
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dma-names = "tx", "rx";
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interconnects = <&clk_virt MASTER_QUP_CORE_0 RPM_ALWAYS_TAG
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&clk_virt SLAVE_QUP_CORE_0 RPM_ALWAYS_TAG>,
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<&bimc MASTER_AMPSS_M0 RPM_ALWAYS_TAG
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&config_noc SLAVE_QUP_0 RPM_ALWAYS_TAG>,
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<&system_noc MASTER_QUP_0 RPM_ALWAYS_TAG
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&bimc SLAVE_EBI_CH0 RPM_ALWAYS_TAG>;
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interconnect-names = "qup-core",
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"qup-config",
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"qup-memory";
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#address-cells = <1>;
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#size-cells = <0>;
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status = "disabled";
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@ -1258,6 +1487,15 @@ spi4: spi@4a90000 {
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dmas = <&gpi_dma0 0 4 QCOM_GPI_SPI>,
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<&gpi_dma0 1 4 QCOM_GPI_SPI>;
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dma-names = "tx", "rx";
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interconnects = <&clk_virt MASTER_QUP_CORE_0 RPM_ALWAYS_TAG
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&clk_virt SLAVE_QUP_CORE_0 RPM_ALWAYS_TAG>,
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<&bimc MASTER_AMPSS_M0 RPM_ALWAYS_TAG
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&config_noc SLAVE_QUP_0 RPM_ALWAYS_TAG>,
|
||||
<&system_noc MASTER_QUP_0 RPM_ALWAYS_TAG
|
||||
&bimc SLAVE_EBI_CH0 RPM_ALWAYS_TAG>;
|
||||
interconnect-names = "qup-core",
|
||||
"qup-config",
|
||||
"qup-memory";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
status = "disabled";
|
||||
|
|
@ -1269,6 +1507,12 @@ uart4: serial@4a90000 {
|
|||
clock-names = "se";
|
||||
clocks = <&gcc GCC_QUPV3_WRAP0_S4_CLK>;
|
||||
interrupts = <GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interconnects = <&clk_virt MASTER_QUP_CORE_0 RPM_ALWAYS_TAG
|
||||
&clk_virt SLAVE_QUP_CORE_0 RPM_ALWAYS_TAG>,
|
||||
<&bimc MASTER_AMPSS_M0 RPM_ALWAYS_TAG
|
||||
&config_noc SLAVE_QUP_0 RPM_ALWAYS_TAG>;
|
||||
interconnect-names = "qup-core",
|
||||
"qup-config";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
|
|
@ -1283,6 +1527,15 @@ i2c5: i2c@4a94000 {
|
|||
dmas = <&gpi_dma0 0 5 QCOM_GPI_I2C>,
|
||||
<&gpi_dma0 1 5 QCOM_GPI_I2C>;
|
||||
dma-names = "tx", "rx";
|
||||
interconnects = <&clk_virt MASTER_QUP_CORE_0 RPM_ALWAYS_TAG
|
||||
&clk_virt SLAVE_QUP_CORE_0 RPM_ALWAYS_TAG>,
|
||||
<&bimc MASTER_AMPSS_M0 RPM_ALWAYS_TAG
|
||||
&config_noc SLAVE_QUP_0 RPM_ALWAYS_TAG>,
|
||||
<&system_noc MASTER_QUP_0 RPM_ALWAYS_TAG
|
||||
&bimc SLAVE_EBI_CH0 RPM_ALWAYS_TAG>;
|
||||
interconnect-names = "qup-core",
|
||||
"qup-config",
|
||||
"qup-memory";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
status = "disabled";
|
||||
|
|
@ -1299,6 +1552,15 @@ spi5: spi@4a94000 {
|
|||
dmas = <&gpi_dma0 0 5 QCOM_GPI_SPI>,
|
||||
<&gpi_dma0 1 5 QCOM_GPI_SPI>;
|
||||
dma-names = "tx", "rx";
|
||||
interconnects = <&clk_virt MASTER_QUP_CORE_0 RPM_ALWAYS_TAG
|
||||
&clk_virt SLAVE_QUP_CORE_0 RPM_ALWAYS_TAG>,
|
||||
<&bimc MASTER_AMPSS_M0 RPM_ALWAYS_TAG
|
||||
&config_noc SLAVE_QUP_0 RPM_ALWAYS_TAG>,
|
||||
<&system_noc MASTER_QUP_0 RPM_ALWAYS_TAG
|
||||
&bimc SLAVE_EBI_CH0 RPM_ALWAYS_TAG>;
|
||||
interconnect-names = "qup-core",
|
||||
"qup-config",
|
||||
"qup-memory";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
status = "disabled";
|
||||
|
|
@ -1330,6 +1592,14 @@ usb: usb@4ef8800 {
|
|||
|
||||
resets = <&gcc GCC_USB30_PRIM_BCR>;
|
||||
power-domains = <&gcc GCC_USB30_PRIM_GDSC>;
|
||||
/* TODO: USB<->IPA path */
|
||||
interconnects = <&system_noc MASTER_USB3 RPM_ALWAYS_TAG
|
||||
&bimc SLAVE_EBI_CH0 RPM_ALWAYS_TAG>,
|
||||
<&bimc MASTER_AMPSS_M0 RPM_ALWAYS_TAG
|
||||
&config_noc SLAVE_USB3 RPM_ALWAYS_TAG>;
|
||||
interconnect-names = "usb-ddr",
|
||||
"apps-usb";
|
||||
|
||||
qcom,select-utmi-as-pipe-clk;
|
||||
status = "disabled";
|
||||
|
||||
|
|
@ -1501,6 +1771,13 @@ mdss: display-subsystem@5e00000 {
|
|||
iommus = <&apps_smmu 0x420 0x2>,
|
||||
<&apps_smmu 0x421 0x0>;
|
||||
|
||||
interconnects = <&mmrt_virt MASTER_MDP_PORT0 RPM_ALWAYS_TAG
|
||||
&bimc SLAVE_EBI_CH0 RPM_ALWAYS_TAG>,
|
||||
<&bimc MASTER_AMPSS_M0 RPM_ALWAYS_TAG
|
||||
&config_noc SLAVE_DISPLAY_CFG RPM_ALWAYS_TAG>;
|
||||
interconnect-names = "mdp0-mem",
|
||||
"cpu-cfg";
|
||||
|
||||
#address-cells = <2>;
|
||||
#size-cells = <2>;
|
||||
ranges;
|
||||
|
|
|
|||
Loading…
Reference in a new issue