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https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git
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CRIS changes for 3.7
-----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.10 (GNU/Linux) iEYEABECAAYFAlBsEtQACgkQ31LbvUHyf1eJ3ACfaR+w5Lg1oXsITx30ziO9xVCu fTcAnAuekSQ/eLZ9BOg78dwZkCYVau7x =yYIG -----END PGP SIGNATURE----- Merge tag 'cris-for-linus-3.7' of git://jni.nu/cris Pull CRIS changes from Jesper Nilsson: "Removal of some unused code from the CRIS port" * tag 'cris-for-linus-3.7' of git://jni.nu/cris: CRIS: Remove VCS simulator specific code cris/PCI: remove pcibios_assign_resources()
This commit is contained in:
commit
b463036ad7
16 changed files with 3 additions and 461 deletions
|
@ -138,11 +138,6 @@ config CRIS_MACH_ARTPEC3
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endchoice
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config ETRAX_VCS_SIM
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bool "VCS Simulator"
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help
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Setup hardware to be run in the VCS simulator.
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config ETRAX_ARCH_V10
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bool
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default y if ETRAX100LX || ETRAX100LX_V2
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@ -329,7 +329,6 @@ static int __init init_axis_flash(void)
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}
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#endif
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#ifndef CONFIG_ETRAX_VCS_SIM
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main_mtd = flash_probe();
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if (main_mtd)
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printk(KERN_INFO "%s: 0x%08x bytes of NOR flash memory.\n",
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@ -603,34 +602,7 @@ static int __init init_axis_flash(void)
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"partition %d\n", part);
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}
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}
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#endif /* CONFIG_EXTRAX_VCS_SIM */
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#ifdef CONFIG_ETRAX_VCS_SIM
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/* For simulator, always use a RAM partition.
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* The rootfs will be found after the kernel in RAM,
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* with romfs_start and romfs_end indicating location and size.
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*/
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struct mtd_info *mtd_ram;
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mtd_ram = kmalloc(sizeof(struct mtd_info), GFP_KERNEL);
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if (!mtd_ram) {
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panic("axisflashmap: Couldn't allocate memory for "
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"mtd_info!\n");
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}
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printk(KERN_INFO "axisflashmap: Adding RAM partition for romfs, "
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"at %u, size %u\n",
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(unsigned) romfs_start, (unsigned) romfs_length);
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err = mtdram_init_device(mtd_ram, (void *)romfs_start,
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romfs_length, "romfs");
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if (err) {
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panic("axisflashmap: Could not initialize MTD RAM "
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"device!\n");
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}
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#endif /* CONFIG_EXTRAX_VCS_SIM */
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#ifndef CONFIG_ETRAX_VCS_SIM
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if (aux_mtd) {
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aux_partition.size = aux_mtd->size;
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err = mtd_device_register(aux_mtd, &aux_partition, 1);
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@ -639,7 +611,6 @@ static int __init init_axis_flash(void)
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"aux mtd device!\n");
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}
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#endif /* CONFIG_EXTRAX_VCS_SIM */
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return err;
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}
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@ -97,28 +97,3 @@ int pcibios_enable_device(struct pci_dev *dev, int mask)
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pcibios_enable_irq(dev);
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return 0;
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}
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int pcibios_assign_resources(void)
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{
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struct pci_dev *dev = NULL;
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int idx;
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struct resource *r;
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while ((dev = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, dev)) != NULL) {
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int class = dev->class >> 8;
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/* Don't touch classless devices and host bridges */
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if (!class || class == PCI_CLASS_BRIDGE_HOST)
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continue;
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for(idx=0; idx<6; idx++) {
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r = &dev->resource[idx];
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if (!r->start && r->end)
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pci_assign_resource(dev, idx);
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}
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}
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return 0;
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}
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EXPORT_SYMBOL(pcibios_assign_resources);
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@ -36,13 +36,6 @@
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.global nand_boot
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.global swapper_pg_dir
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;; Dummy section to make it bootable with current VCS simulator
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#ifdef CONFIG_ETRAX_VCS_SIM
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.section ".boot", "ax"
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ba tstart
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nop
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#endif
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.text
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tstart:
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;; This is the entry point of the kernel. The CPU is currently in
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@ -75,17 +68,10 @@ secondary_cpu_entry: /* Entry point for secondary CPUs */
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| REG_FIELD(mmu, rw_mm_kbase_hi, base_c, 4) \
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| REG_FIELD(mmu, rw_mm_kbase_hi, base_d, 5) \
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| REG_FIELD(mmu, rw_mm_kbase_hi, base_b, 0xb), $r0
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#elif !defined(CONFIG_ETRAX_VCS_SIM)
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#else
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move.d REG_FIELD(mmu, rw_mm_kbase_hi, base_e, 8) \
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| REG_FIELD(mmu, rw_mm_kbase_hi, base_c, 4) \
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| REG_FIELD(mmu, rw_mm_kbase_hi, base_b, 0xb), $r0
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#else
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;; Map the virtual DRAM to the RW eprom area at address 0.
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;; Also map 0xa for the hook calls,
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move.d REG_FIELD(mmu, rw_mm_kbase_hi, base_e, 8) \
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| REG_FIELD(mmu, rw_mm_kbase_hi, base_c, 4) \
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| REG_FIELD(mmu, rw_mm_kbase_hi, base_b, 0xb) \
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| REG_FIELD(mmu, rw_mm_kbase_hi, base_a, 0xa), $r0
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#endif
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;; Temporary map of 0x40 -> 0x40 and 0x00 -> 0x00.
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@ -126,27 +112,6 @@ secondary_cpu_entry: /* Entry point for secondary CPUs */
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| REG_STATE(mmu, rw_mm_cfg, seg_2, page) \
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| REG_STATE(mmu, rw_mm_cfg, seg_1, page) \
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| REG_STATE(mmu, rw_mm_cfg, seg_0, linear), $r2
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#elif !defined(CONFIG_ETRAX_VCS_SIM)
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move.d REG_STATE(mmu, rw_mm_cfg, we, on) \
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| REG_STATE(mmu, rw_mm_cfg, acc, on) \
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| REG_STATE(mmu, rw_mm_cfg, ex, on) \
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| REG_STATE(mmu, rw_mm_cfg, inv, on) \
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| REG_STATE(mmu, rw_mm_cfg, seg_f, linear) \
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| REG_STATE(mmu, rw_mm_cfg, seg_e, linear) \
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| REG_STATE(mmu, rw_mm_cfg, seg_d, page) \
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| REG_STATE(mmu, rw_mm_cfg, seg_c, linear) \
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| REG_STATE(mmu, rw_mm_cfg, seg_b, linear) \
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| REG_STATE(mmu, rw_mm_cfg, seg_a, page) \
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| REG_STATE(mmu, rw_mm_cfg, seg_9, page) \
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| REG_STATE(mmu, rw_mm_cfg, seg_8, page) \
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| REG_STATE(mmu, rw_mm_cfg, seg_7, page) \
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| REG_STATE(mmu, rw_mm_cfg, seg_6, page) \
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| REG_STATE(mmu, rw_mm_cfg, seg_5, page) \
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| REG_STATE(mmu, rw_mm_cfg, seg_4, linear) \
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| REG_STATE(mmu, rw_mm_cfg, seg_3, page) \
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| REG_STATE(mmu, rw_mm_cfg, seg_2, page) \
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| REG_STATE(mmu, rw_mm_cfg, seg_1, page) \
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| REG_STATE(mmu, rw_mm_cfg, seg_0, linear), $r2
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#else
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move.d REG_STATE(mmu, rw_mm_cfg, we, on) \
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| REG_STATE(mmu, rw_mm_cfg, acc, on) \
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@ -157,7 +122,7 @@ secondary_cpu_entry: /* Entry point for secondary CPUs */
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| REG_STATE(mmu, rw_mm_cfg, seg_d, page) \
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| REG_STATE(mmu, rw_mm_cfg, seg_c, linear) \
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| REG_STATE(mmu, rw_mm_cfg, seg_b, linear) \
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| REG_STATE(mmu, rw_mm_cfg, seg_a, linear) \
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| REG_STATE(mmu, rw_mm_cfg, seg_a, page) \
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| REG_STATE(mmu, rw_mm_cfg, seg_9, page) \
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| REG_STATE(mmu, rw_mm_cfg, seg_8, page) \
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| REG_STATE(mmu, rw_mm_cfg, seg_7, page) \
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@ -226,7 +191,6 @@ master_cpu:
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move.d secondary_cpu_entry, $r1
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move.d $r1, [$r0]
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#endif
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#ifndef CONFIG_ETRAX_VCS_SIM
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; Check if starting from DRAM (network->RAM boot or unpacked
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; compressed kernel), or directly from flash.
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lapcq ., $r0
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@ -234,7 +198,6 @@ master_cpu:
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cmp.d 0x10000, $r0 ; Arbitrary, something above this code.
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blo _inflash0
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nop
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#endif
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jump _inram ; Jump to cached RAM.
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nop
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@ -326,7 +289,6 @@ move_cramfs:
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move.d romfs_length, $r1
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move.d $r0, [$r1]
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#ifndef CONFIG_ETRAX_VCS_SIM
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;; The kernel could have been unpacked to DRAM by the loader, but
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;; the cramfs image could still be in the flash immediately
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;; following the compressed kernel image. The loader passes the address
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@ -335,10 +297,6 @@ move_cramfs:
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cmp.d 0x0ffffff8, $r9
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bhs _no_romfs_in_flash ; R9 points outside the flash area.
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nop
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#else
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ba _no_romfs_in_flash
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nop
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#endif
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;; cramfs rootfs might to be in flash. Check for it.
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move.d [$r9], $r0 ; cramfs_super.magic
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cmp.d CRAMFS_MAGIC, $r0
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@ -396,7 +354,6 @@ _no_romfs_in_flash:
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move.d romfs_length, $r3
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move.d $r2, [$r3] ; store size at romfs_length
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#ifndef CONFIG_ETRAX_VCS_SIM
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add.d $r2, $r0 ; copy from end and downwards
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add.d $r2, $r1
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@ -410,7 +367,6 @@ _no_romfs_in_flash:
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subq 1, $r2
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bne 1b
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nop
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#endif
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4:
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;; BSS move done.
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@ -455,7 +411,6 @@ no_command_line:
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move.d etrax_irv, $r1 ; Set the exception base register and pointer.
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move.d $r0, [$r1]
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#ifndef CONFIG_ETRAX_VCS_SIM
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;; Clear the BSS region from _bss_start to _end.
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move.d __bss_start, $r0
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move.d _end, $r1
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@ -463,15 +418,6 @@ no_command_line:
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cmp.d $r1, $r0
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blo 1b
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nop
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#endif
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#ifdef CONFIG_ETRAX_VCS_SIM
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/* Set the watchdog timeout to something big. Will be removed when */
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/* watchdog can be disabled with command line option */
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move.d 0x7fffffff, $r10
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jsr CPU_WATCHDOG_TIMEOUT
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nop
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#endif
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; Initialize registers to increase determinism
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move.d __bss_start, $r0
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|
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@ -381,23 +381,9 @@ static int read_register(char regno, unsigned int *valptr);
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/* Serial port, reads one character. ETRAX 100 specific. from debugport.c */
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int getDebugChar(void);
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#ifdef CONFIG_ETRAX_VCS_SIM
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int getDebugChar(void)
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{
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return socketread();
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}
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#endif
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/* Serial port, writes one character. ETRAX 100 specific. from debugport.c */
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void putDebugChar(int val);
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#ifdef CONFIG_ETRAX_VCS_SIM
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void putDebugChar(int val)
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{
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socketwrite((char *)&val, 1);
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}
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#endif
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/* Returns the integer equivalent of a hexadecimal character. */
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static int hex(char ch);
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|
|
|
@ -1,10 +1,8 @@
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# $Id: Makefile,v 1.3 2007/03/13 11:57:46 starvik Exp $
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#
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# Makefile for the linux kernel.
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#
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obj-y := dma.o pinmux.o io.o arbiter.o
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obj-$(CONFIG_ETRAX_VCS_SIM) += vcs_hook.o
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obj-$(CONFIG_CPU_FREQ) += cpufreq.o
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clean:
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|
|
|
@ -1,103 +0,0 @@
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/*
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* Simulator hook mechanism
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*/
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#include "vcs_hook.h"
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#include <asm/io.h>
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#include <stdarg.h>
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#define HOOK_TRIG_ADDR 0xb7000000
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#define HOOK_MEM_BASE_ADDR 0xce000000
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static volatile unsigned *hook_base;
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|
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#define HOOK_DATA(offset) hook_base[offset]
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#define VHOOK_DATA(offset) hook_base[offset]
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#define HOOK_TRIG(funcid) \
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do { \
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*((unsigned *) HOOK_TRIG_ADDR) = funcid; \
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} while (0)
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#define HOOK_DATA_BYTE(offset) ((unsigned char *)hook_base)[offset]
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|
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static void hook_init(void)
|
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{
|
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static int first = 1;
|
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if (first) {
|
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first = 0;
|
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hook_base = ioremap(HOOK_MEM_BASE_ADDR, 8192);
|
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}
|
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}
|
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|
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static unsigned hook_trig(unsigned id)
|
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{
|
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unsigned ret;
|
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|
||||
/* preempt_disable(); */
|
||||
|
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/* Dummy read from mem to make sure data has propagated to memory
|
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* before trigging */
|
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ret = *hook_base;
|
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|
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/* trigger hook */
|
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HOOK_TRIG(id);
|
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|
||||
/* wait for call to finish */
|
||||
while (VHOOK_DATA(0) > 0) ;
|
||||
|
||||
/* extract return value */
|
||||
|
||||
ret = VHOOK_DATA(1);
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
int hook_call(unsigned id, unsigned pcnt, ...)
|
||||
{
|
||||
va_list ap;
|
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int i;
|
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unsigned ret;
|
||||
|
||||
hook_init();
|
||||
|
||||
HOOK_DATA(0) = id;
|
||||
|
||||
va_start(ap, pcnt);
|
||||
for (i = 1; i <= pcnt; i++)
|
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HOOK_DATA(i) = va_arg(ap, unsigned);
|
||||
va_end(ap);
|
||||
|
||||
ret = hook_trig(id);
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
int hook_call_str(unsigned id, unsigned size, const char *str)
|
||||
{
|
||||
int i;
|
||||
unsigned ret;
|
||||
|
||||
hook_init();
|
||||
|
||||
HOOK_DATA(0) = id;
|
||||
HOOK_DATA(1) = size;
|
||||
|
||||
for (i = 0; i < size; i++)
|
||||
HOOK_DATA_BYTE(8 + i) = str[i];
|
||||
HOOK_DATA_BYTE(8 + i) = 0;
|
||||
|
||||
ret = hook_trig(id);
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
void print_str(const char *str)
|
||||
{
|
||||
int i;
|
||||
/* find null at end of string */
|
||||
for (i = 1; str[i]; i++) ;
|
||||
hook_call(hook_print_str, i, str);
|
||||
}
|
||||
|
||||
void CPU_WATCHDOG_TIMEOUT(unsigned t)
|
||||
{
|
||||
}
|
|
@ -1,58 +0,0 @@
|
|||
/*
|
||||
* Simulator hook call mechanism
|
||||
*/
|
||||
|
||||
#ifndef __hook_h__
|
||||
#define __hook_h__
|
||||
|
||||
int hook_call(unsigned id, unsigned pcnt, ...);
|
||||
int hook_call_str(unsigned id, unsigned size, const char *str);
|
||||
|
||||
enum hook_ids {
|
||||
hook_debug_on = 1,
|
||||
hook_debug_off,
|
||||
hook_stop_sim_ok,
|
||||
hook_stop_sim_fail,
|
||||
hook_alloc_shared,
|
||||
hook_ptr_shared,
|
||||
hook_free_shared,
|
||||
hook_file2shared,
|
||||
hook_cmp_shared,
|
||||
hook_print_params,
|
||||
hook_sim_time,
|
||||
hook_stop_sim,
|
||||
hook_kick_dog,
|
||||
hook_dog_timeout,
|
||||
hook_rand,
|
||||
hook_srand,
|
||||
hook_rand_range,
|
||||
hook_print_str,
|
||||
hook_print_hex,
|
||||
hook_cmp_offset_shared,
|
||||
hook_fill_random_shared,
|
||||
hook_alloc_random_data,
|
||||
hook_calloc_random_data,
|
||||
hook_print_int,
|
||||
hook_print_uint,
|
||||
hook_fputc,
|
||||
hook_init_fd,
|
||||
hook_sbrk,
|
||||
hook_print_context_descr,
|
||||
hook_print_data_descr,
|
||||
hook_print_group_descr,
|
||||
hook_fill_shared,
|
||||
hook_sl_srand,
|
||||
hook_sl_rand_irange,
|
||||
hook_sl_rand_urange,
|
||||
hook_sl_sh_malloc_aligned,
|
||||
hook_sl_sh_calloc_aligned,
|
||||
hook_sl_sh_alloc_random_data,
|
||||
hook_sl_sh_file2mem,
|
||||
hook_sl_vera_mbox_handle,
|
||||
hook_sl_vera_mbox_put,
|
||||
hook_sl_vera_mbox_get,
|
||||
hook_sl_system,
|
||||
hook_sl_sh_hexdump
|
||||
};
|
||||
|
||||
#endif
|
|
@ -1,10 +1,8 @@
|
|||
# $Id: Makefile,v 1.3 2007/03/13 11:57:46 starvik Exp $
|
||||
#
|
||||
# Makefile for the linux kernel.
|
||||
#
|
||||
|
||||
obj-y := dma.o pinmux.o io.o arbiter.o
|
||||
obj-$(CONFIG_ETRAX_VCS_SIM) += vcs_hook.o
|
||||
obj-$(CONFIG_CPU_FREQ) += cpufreq.o
|
||||
|
||||
clean:
|
||||
|
|
|
@ -1,100 +0,0 @@
|
|||
/*
|
||||
* Call simulator hook. This is the part running in the
|
||||
* simulated program.
|
||||
*/
|
||||
|
||||
#include "vcs_hook.h"
|
||||
#include <stdarg.h>
|
||||
#include <arch-v32/hwregs/reg_map.h>
|
||||
#include <arch-v32/hwregs/intr_vect_defs.h>
|
||||
|
||||
#define HOOK_TRIG_ADDR 0xb7000000 /* hook cvlog model reg address */
|
||||
#define HOOK_MEM_BASE_ADDR 0xa0000000 /* csp4 (shared mem) base addr */
|
||||
|
||||
#define HOOK_DATA(offset) ((unsigned *)HOOK_MEM_BASE_ADDR)[offset]
|
||||
#define VHOOK_DATA(offset) ((volatile unsigned *)HOOK_MEM_BASE_ADDR)[offset]
|
||||
#define HOOK_TRIG(funcid) \
|
||||
do { \
|
||||
*((unsigned *) HOOK_TRIG_ADDR) = funcid; \
|
||||
} while (0)
|
||||
#define HOOK_DATA_BYTE(offset) ((unsigned char *)HOOK_MEM_BASE_ADDR)[offset]
|
||||
|
||||
int hook_call(unsigned id, unsigned pcnt, ...)
|
||||
{
|
||||
va_list ap;
|
||||
unsigned i;
|
||||
unsigned ret;
|
||||
#ifdef USING_SOS
|
||||
PREEMPT_OFF_SAVE();
|
||||
#endif
|
||||
|
||||
/* pass parameters */
|
||||
HOOK_DATA(0) = id;
|
||||
|
||||
/* Have to make hook_print_str a special case since we call with a
|
||||
* parameter of byte type. Should perhaps be a separate
|
||||
* hook_call. */
|
||||
|
||||
if (id == hook_print_str) {
|
||||
int i;
|
||||
char *str;
|
||||
|
||||
HOOK_DATA(1) = pcnt;
|
||||
|
||||
va_start(ap, pcnt);
|
||||
str = (char *)va_arg(ap, unsigned);
|
||||
|
||||
for (i = 0; i != pcnt; i++)
|
||||
HOOK_DATA_BYTE(8 + i) = str[i];
|
||||
|
||||
HOOK_DATA_BYTE(8 + i) = 0; /* null byte */
|
||||
} else {
|
||||
va_start(ap, pcnt);
|
||||
for (i = 1; i <= pcnt; i++)
|
||||
HOOK_DATA(i) = va_arg(ap, unsigned);
|
||||
va_end(ap);
|
||||
}
|
||||
|
||||
/* read from mem to make sure data has propagated to memory before
|
||||
* trigging */
|
||||
ret = *((volatile unsigned *)HOOK_MEM_BASE_ADDR);
|
||||
|
||||
/* trigger hook */
|
||||
HOOK_TRIG(id);
|
||||
|
||||
/* wait for call to finish */
|
||||
while (VHOOK_DATA(0) > 0) ;
|
||||
|
||||
/* extract return value */
|
||||
|
||||
ret = VHOOK_DATA(1);
|
||||
|
||||
#ifdef USING_SOS
|
||||
PREEMPT_RESTORE();
|
||||
#endif
|
||||
return ret;
|
||||
}
|
||||
|
||||
unsigned hook_buf(unsigned i)
|
||||
{
|
||||
return (HOOK_DATA(i));
|
||||
}
|
||||
|
||||
void print_str(const char *str)
|
||||
{
|
||||
int i;
|
||||
/* find null at end of string */
|
||||
for (i = 1; str[i]; i++) ;
|
||||
hook_call(hook_print_str, i, str);
|
||||
}
|
||||
|
||||
void CPU_KICK_DOG(void)
|
||||
{
|
||||
(void)hook_call(hook_kick_dog, 0);
|
||||
}
|
||||
|
||||
void CPU_WATCHDOG_TIMEOUT(unsigned t)
|
||||
{
|
||||
(void)hook_call(hook_dog_timeout, 1, t);
|
||||
}
|
||||
|
|
@ -1,42 +0,0 @@
|
|||
/*
|
||||
* Call simulator hook functions
|
||||
*/
|
||||
|
||||
#ifndef HOOK_H
|
||||
#define HOOK_H
|
||||
|
||||
int hook_call(unsigned id, unsigned pcnt, ...);
|
||||
|
||||
enum hook_ids {
|
||||
hook_debug_on = 1,
|
||||
hook_debug_off,
|
||||
hook_stop_sim_ok,
|
||||
hook_stop_sim_fail,
|
||||
hook_alloc_shared,
|
||||
hook_ptr_shared,
|
||||
hook_free_shared,
|
||||
hook_file2shared,
|
||||
hook_cmp_shared,
|
||||
hook_print_params,
|
||||
hook_sim_time,
|
||||
hook_stop_sim,
|
||||
hook_kick_dog,
|
||||
hook_dog_timeout,
|
||||
hook_rand,
|
||||
hook_srand,
|
||||
hook_rand_range,
|
||||
hook_print_str,
|
||||
hook_print_hex,
|
||||
hook_cmp_offset_shared,
|
||||
hook_fill_random_shared,
|
||||
hook_alloc_random_data,
|
||||
hook_calloc_random_data,
|
||||
hook_print_int,
|
||||
hook_print_uint,
|
||||
hook_fputc,
|
||||
hook_init_fd,
|
||||
hook_sbrk
|
||||
|
||||
};
|
||||
|
||||
#endif
|
|
@ -73,11 +73,7 @@ void __init cris_mmu_init(void)
|
|||
#endif
|
||||
REG_STATE(mmu, rw_mm_cfg, seg_c, linear) |
|
||||
REG_STATE(mmu, rw_mm_cfg, seg_b, linear) |
|
||||
#ifndef CONFIG_ETRAX_VCS_SIM
|
||||
REG_STATE(mmu, rw_mm_cfg, seg_a, page) |
|
||||
#else
|
||||
REG_STATE(mmu, rw_mm_cfg, seg_a, linear) |
|
||||
#endif
|
||||
REG_STATE(mmu, rw_mm_cfg, seg_9, page) |
|
||||
REG_STATE(mmu, rw_mm_cfg, seg_8, page) |
|
||||
REG_STATE(mmu, rw_mm_cfg, seg_7, page) |
|
||||
|
@ -100,11 +96,7 @@ void __init cris_mmu_init(void)
|
|||
#endif
|
||||
REG_FIELD(mmu, rw_mm_kbase_hi, base_c, 0x4) |
|
||||
REG_FIELD(mmu, rw_mm_kbase_hi, base_b, 0xb) |
|
||||
#ifndef CONFIG_ETRAX_VCS_SIM
|
||||
REG_FIELD(mmu, rw_mm_kbase_hi, base_a, 0x0) |
|
||||
#else
|
||||
REG_FIELD(mmu, rw_mm_kbase_hi, base_a, 0xa) |
|
||||
#endif
|
||||
REG_FIELD(mmu, rw_mm_kbase_hi, base_9, 0x0) |
|
||||
REG_FIELD(mmu, rw_mm_kbase_hi, base_8, 0x0));
|
||||
|
||||
|
|
|
@ -11,13 +11,8 @@
|
|||
* selected bit it's possible to convert between KSEG_x and 0x40000000 where the
|
||||
* DRAM really resides. DRAM is virtually at 0xc.
|
||||
*/
|
||||
#ifndef CONFIG_ETRAX_VCS_SIM
|
||||
#define __pa(x) ((unsigned long)(x) & 0x7fffffff)
|
||||
#define __va(x) ((void *)((unsigned long)(x) | 0x80000000))
|
||||
#else
|
||||
#define __pa(x) ((unsigned long)(x) & 0x3fffffff)
|
||||
#define __va(x) ((void *)((unsigned long)(x) | 0xc0000000))
|
||||
#endif
|
||||
|
||||
#define VM_STACK_DEFAULT_FLAGS (VM_READ | VM_WRITE | \
|
||||
VM_MAYREAD | VM_MAYWRITE)
|
||||
|
|
|
@ -21,13 +21,9 @@ struct thread_struct {
|
|||
|
||||
/*
|
||||
* User-space process size. This is hardcoded into a few places, so don't
|
||||
* changed it unless everything's clear!
|
||||
* change it unless everything's clear!
|
||||
*/
|
||||
#ifndef CONFIG_ETRAX_VCS_SIM
|
||||
#define TASK_SIZE (0xB0000000UL)
|
||||
#else
|
||||
#define TASK_SIZE (0xA0000000UL)
|
||||
#endif
|
||||
|
||||
/* CCS I=1, enable interrupts. */
|
||||
#define INIT_THREAD { 0, 0, (1 << I_CCS_BITNR) }
|
||||
|
|
|
@ -71,12 +71,6 @@
|
|||
move.d REG_ADDR(bif_core, regi_bif_core, rw_grp4_cfg), $r0
|
||||
move.d CONFIG_ETRAX_MEM_GRP4_CONFIG, $r1
|
||||
move.d $r1, [$r0]
|
||||
#ifdef CONFIG_ETRAX_VCS_SIM
|
||||
;; Set up minimal flash waitstates
|
||||
move.d 0, $r10
|
||||
move.d REG_ADDR(bif_core, regi_bif_core, rw_grp1_cfg), $r11
|
||||
move.d $r10, [$r11]
|
||||
#endif
|
||||
.endm
|
||||
|
||||
#endif
|
||||
|
|
|
@ -19,7 +19,6 @@ extern unsigned long pci_mem_start;
|
|||
|
||||
void pcibios_config_init(void);
|
||||
struct pci_bus * pcibios_scan_root(int bus);
|
||||
int pcibios_assign_resources(void);
|
||||
|
||||
void pcibios_set_master(struct pci_dev *dev);
|
||||
void pcibios_penalize_isa_irq(int irq);
|
||||
|
|
Loading…
Reference in a new issue