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ARM: tegra: apalis_t30: support v1.1 hardware revision 

Support the V1.1 hardware revisions with the following change:

Changed power rail for MMC1 interface to a 3.3V/1.8V switchable rail in
order to be able to run UHS SD cards in ultra high speed 1.8V mode.

[  207.502011] mmc2: host does not support reading read-only switch,
 assuming write-enable
[  207.517011] mmc2: new ultra high speed SDR104 SDHC card at address
 aaaa
[  207.534190] mmcblk2: mmc2:aaaa SE32G 29.7 GiB
[  207.545096]  mmcblk2: p1

root@apalis-t30:~# cat /sys/kernel/debug/mmc2/ios
clock:          208000000 Hz
actual clock:   204000000 Hz
vdd:            21 (3.3 ~ 3.4 V)
bus mode:       2 (push-pull)
chip select:    0 (don't care)
power mode:     2 (on)
bus width:      2 (4 bits)
timing spec:    6 (sd uhs SDR104)
signal voltage: 1 (1.80 V)
driver type:    0 (driver type B)
root@apalis-t30:~# hdparm -t /dev/mmcblk2

/dev/mmcblk2:
 Timing buffered disk reads: 256 MB in  3.02 seconds =  84.71 MB/sec

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
This commit is contained in:
Marcel Ziswiler 2018-08-31 18:38:16 +02:00 committed by Thierry Reding
parent a472e00b1c
commit b57d6b996e
5 changed files with 1459 additions and 2 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
Documentation/devicetree/bindings/arm/tegra.txt
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@ -47,6 +47,8 @@ board-specific compatible values:
nvidia,ventana
toradex,apalis_t30
toradex,apalis_t30-eval
toradex,apalis_t30-v1.1
toradex,apalis_t30-v1.1-eval
toradex,apalis-tk1
toradex,apalis-tk1-eval
toradex,colibri_t20-512

1
arch/arm/boot/dts/Makefile
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@ -1071,6 +1071,7 @@ dtb-$(CONFIG_ARCH_TEGRA_2x_SOC) += \
tegra20-ventana.dtb
dtb-$(CONFIG_ARCH_TEGRA_3x_SOC) += \
tegra30-apalis-eval.dtb \
tegra30-apalis-v1.1-eval.dtb \
tegra30-beaver.dtb \
tegra30-cardhu-a02.dtb \
tegra30-cardhu-a04.dtb \

266
arch/arm/boot/dts/tegra30-apalis-v1.1-eval.dts Normal file
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@ -0,0 +1,266 @@
// SPDX-License-Identifier: GPL-2.0 OR MIT
/dts-v1/;
#include <dt-bindings/input/input.h>
#include "tegra30-apalis-v1.1.dtsi"
/ {
model = "Toradex Apalis T30 on Apalis Evaluation Board";
compatible = "toradex,apalis_t30-v1.1-eval", "toradex,apalis_t30-eval",
"toradex,apalis_t30-v1.1", "toradex,apalis_t30",
"nvidia,tegra30";
aliases {
rtc0 = "/i2c@7000c000/rtc@68";
rtc1 = "/i2c@7000d000/pmic@2d";
rtc2 = "/rtc@7000e000";
serial0 = &uarta;
serial1 = &uartb;
serial2 = &uartc;
serial3 = &uartd;
};
chosen {
stdout-path = "serial0:115200n8";
};
pcie@3000 {
pci@1,0 {
status = "okay";
};
pci@2,0 {
status = "okay";
};
};
host1x@50000000 {
dc@54200000 {
rgb {
status = "okay";
nvidia,panel = <&panel>;
};
};
hdmi@54280000 {
status = "okay";
hdmi-supply = <&reg_5v0>;
};
};
/* Apalis UART1 */
serial@70006000 {
status = "okay";
};
/* Apalis UART2 */
serial@70006040 {
status = "okay";
};
/* Apalis UART3 */
serial@70006200 {
status = "okay";
};
/* Apalis UART4 */
serial@70006300 {
status = "okay";
};
pwm@7000a000 {
status = "okay";
};
/*
* GEN1_I2C: I2C1_SDA/SCL on MXM3 pin 209/211 (e.g. RTC on carrier
* board)
*/
i2c@7000c000 {
status = "okay";
clock-frequency = <400000>;
pcie-switch@58 {
compatible = "plx,pex8605";
reg = <0x58>;
};
/* M41T0M6 real time clock on carrier board */
rtc@68 {
compatible = "st,m41t0";
reg = <0x68>;
};
};
/* GEN2_I2C: unused */
/*
* CAM_I2C: I2C3_SDA/SCL on MXM3 pin 201/203 (e.g. camera sensor on
* carrier board)
*/
i2c@7000c500 {
status = "okay";
clock-frequency = <400000>;
};
/* DDC: I2C2_SDA/SCL on MXM3 pin 205/207 (e.g. display EDID) */
i2c@7000c700 {
status = "okay";
};
/* SPI1: Apalis SPI1 */
spi@7000d400 {
status = "okay";
spi-max-frequency = <25000000>;
};
/* SPI5: Apalis SPI2 */
spi@7000dc00 {
status = "okay";
spi-max-frequency = <25000000>;
};
/* Apalis SD1 */
sdhci@78000000 {
status = "okay";
bus-width = <4>;
/* SD1_CD# */
cd-gpios = <&gpio TEGRA_GPIO(CC, 5) GPIO_ACTIVE_LOW>;
no-1-8-v;
};
/* Apalis MMC1 */
sdhci@78000400 {
status = "okay";
bus-width = <8>;
/* MMC1_CD# */
cd-gpios = <&gpio TEGRA_GPIO(V, 3) GPIO_ACTIVE_LOW>;
vqmmc-supply = <&reg_vddio_sdmmc3>;
};
/* EHCI instance 0: USB1_DP/N -> USBO1_DP/N */
usb@7d000000 {
status = "okay";
dr_mode = "otg";
};
usb-phy@7d000000 {
status = "okay";
vbus-supply = <&reg_usbo1_vbus>;
};
/* EHCI instance 1: USB2_DP/N -> USBH2_DP/N */
usb@7d004000 {
status = "okay";
};
usb-phy@7d004000 {
status = "okay";
vbus-supply = <&reg_usbh_vbus>;
};
/* EHCI instance 2: USB3_DP/N -> USBH3_DP/N */
usb@7d008000 {
status = "okay";
};
usb-phy@7d008000 {
status = "okay";
vbus-supply = <&reg_usbh_vbus>;
};
backlight: backlight {
compatible = "pwm-backlight";
brightness-levels = <255 231 223 207 191 159 127 0>;
default-brightness-level = <6>;
/* BKL1_ON */
enable-gpios = <&gpio TEGRA_GPIO(V, 2) GPIO_ACTIVE_HIGH>;
power-supply = <&reg_3v3>;
pwms = <&pwm 0 5000000>; /* BKL1_PWM */
};
gpio-keys {
compatible = "gpio-keys";
wakeup {
label = "WAKE1_MICO";
gpios = <&gpio TEGRA_GPIO(V, 1) GPIO_ACTIVE_LOW>;
linux,code = <KEY_WAKEUP>;
debounce-interval = <10>;
wakeup-source;
};
};
panel: panel {
/*
* edt,et057090dhu: EDT 5.7" LCD TFT
* edt,et070080dh6: EDT 7.0" LCD TFT
*/
compatible = "edt,et057090dhu", "simple-panel";
backlight = <&backlight>;
power-supply = <&reg_3v3>;
};
reg_3v3: regulator-3v3 {
compatible = "regulator-fixed";
regulator-name = "3.3V_SW";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
};
reg_5v0: regulator-5v0 {
compatible = "regulator-fixed";
regulator-name = "5V_SW";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
};
/* USBO1_EN */
reg_usbo1_vbus: regulator-usbo1-vbus {
compatible = "regulator-fixed";
regulator-name = "VCC_USBO1";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
gpio = <&gpio TEGRA_GPIO(T, 5) GPIO_ACTIVE_HIGH>;
enable-active-high;
vin-supply = <&reg_5v0>;
};
/* USBH_EN */
reg_usbh_vbus: regulator-usbh-vbus {
compatible = "regulator-fixed";
regulator-name = "VCC_USBH(2A|2C|2D|3|4)";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
gpio = <&gpio TEGRA_GPIO(DD, 1) GPIO_ACTIVE_HIGH>;
enable-active-high;
vin-supply = <&reg_5v0>;
};
/*
* 1.8 volt resp. 3.3 volt VDDIO_SDMMC3 depending on
* EN_+3.3_SDMMC3 GPIO
*/
reg_vddio_sdmmc3: regulator-vddio-sdmmc3 {
compatible = "regulator-gpio";
regulator-name = "VDDIO_SDMMC3";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <3300000>;
regulator-type = "voltage";
gpios = <&gpio TEGRA_GPIO(J, 5) GPIO_ACTIVE_HIGH>;
states = <1800000 0x0
3300000 0x1>;
startup-delay-us = <100000>;
vin-supply = <&vddio_sdmmc_1v8_reg>;
};
};
&gpio {
/* Apalis GPIO7 MXM3 pin 15 PLX PEX 8605 PCIe Switch Reset */
pex-perst-n {
gpio-hog;
gpios = <TEGRA_GPIO(S, 7) GPIO_ACTIVE_HIGH>;
output-high;
line-name = "PEX_PERST_N";
};
};

1189
arch/arm/boot/dts/tegra30-apalis-v1.1.dtsi Normal file
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File diff suppressed because it is too large Load Diff

3
arch/arm/boot/dts/tegra30-apalis.dtsi
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@ -3,8 +3,7 @@
/*
* Toradex Apalis T30 Module Device Tree
* Compatible for Revisions 1GB: V1.0A, V1.1A; 1GB IT: V1.1A;
* 2GB: V1.0B, V1.0C, V1.0E, V1.1A
* Compatible for Revisions 1GB: V1.0A; 2GB: V1.0B, V1.0C, V1.0E
*/
/ {
memory@80000000 {