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microblaze/mm: support __HAVE_ARCH_PTE_SWP_EXCLUSIVE
Let's support __HAVE_ARCH_PTE_SWP_EXCLUSIVE by stealing one bit from the type. Generic MM currently only uses 5 bits for the type (MAX_SWAPFILES_SHIFT), so the stolen bit is effectively unused. The shift by 2 when converting between PTE and arch-specific swap entry makes the swap PTE layout a little bit harder to decipher. While at it, drop the comment from paulus---copy-and-paste leftover from powerpc where we actually have _PAGE_HASHPTE---and mask the type in __swp_entry_to_pte() as well. Link: https://lkml.kernel.org/r/20230113171026.582290-12-david@redhat.com Signed-off-by: David Hildenbrand <david@redhat.com> Cc: Michal Simek <monstr@monstr.eu> Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
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2 changed files with 37 additions and 12 deletions
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@ -46,8 +46,8 @@
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#define _CACHEMASK040 (~0x060)
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#define _PAGE_GLOBAL040 0x400 /* 68040 global bit, used for kva descs */
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/* We borrow bit 7 to store the exclusive marker in swap PTEs. */
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#define _PAGE_SWP_EXCLUSIVE 0x080
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/* We borrow bit 24 to store the exclusive marker in swap PTEs. */
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#define _PAGE_SWP_EXCLUSIVE CF_PAGE_NOCACHE
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/*
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* Externally used page protection values.
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@ -131,10 +131,10 @@ extern pte_t *va_to_pte(unsigned long address);
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* of the 16 available. Bit 24-26 of the TLB are cleared in the TLB
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* miss handler. Bit 27 is PAGE_USER, thus selecting the correct
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* zone.
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* - PRESENT *must* be in the bottom two bits because swap cache
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* entries use the top 30 bits. Because 4xx doesn't support SMP
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* anyway, M is irrelevant so we borrow it for PAGE_PRESENT. Bit 30
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* is cleared in the TLB miss handler before the TLB entry is loaded.
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* - PRESENT *must* be in the bottom two bits because swap PTEs use the top
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* 30 bits. Because 4xx doesn't support SMP anyway, M is irrelevant so we
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* borrow it for PAGE_PRESENT. Bit 30 is cleared in the TLB miss handler
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* before the TLB entry is loaded.
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* - All other bits of the PTE are loaded into TLBLO without
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* * modification, leaving us only the bits 20, 21, 24, 25, 26, 30 for
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* software PTE bits. We actually use bits 21, 24, 25, and
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@ -155,6 +155,9 @@ extern pte_t *va_to_pte(unsigned long address);
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#define _PAGE_ACCESSED 0x400 /* software: R: page referenced */
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#define _PMD_PRESENT PAGE_MASK
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/* We borrow bit 24 to store the exclusive marker in swap PTEs. */
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#define _PAGE_SWP_EXCLUSIVE _PAGE_DIRTY
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/*
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* Some bits are unused...
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*/
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@ -393,18 +396,40 @@ static inline unsigned long pmd_page_vaddr(pmd_t pmd)
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extern pgd_t swapper_pg_dir[PTRS_PER_PGD];
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/*
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* Encode and decode a swap entry.
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* Note that the bits we use in a PTE for representing a swap entry
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* must not include the _PAGE_PRESENT bit, or the _PAGE_HASHPTE bit
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* (if used). -- paulus
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* Encode/decode swap entries and swap PTEs. Swap PTEs are all PTEs that
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* are !pte_none() && !pte_present().
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*
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* 1 1 1 1 1 1 1 1 1 2 2 2 2 2 2 2 2 2 2 3 3
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* 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1
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* <------------------ offset -------------------> E < type -> 0 0
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*
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* E is the exclusive marker that is not stored in swap entries.
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*/
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#define __swp_type(entry) ((entry).val & 0x3f)
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#define __swp_type(entry) ((entry).val & 0x1f)
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#define __swp_offset(entry) ((entry).val >> 6)
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#define __swp_entry(type, offset) \
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((swp_entry_t) { (type) | ((offset) << 6) })
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((swp_entry_t) { ((type) & 0x1f) | ((offset) << 6) })
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#define __pte_to_swp_entry(pte) ((swp_entry_t) { pte_val(pte) >> 2 })
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#define __swp_entry_to_pte(x) ((pte_t) { (x).val << 2 })
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#define __HAVE_ARCH_PTE_SWP_EXCLUSIVE
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static inline int pte_swp_exclusive(pte_t pte)
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{
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return pte_val(pte) & _PAGE_SWP_EXCLUSIVE;
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}
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static inline pte_t pte_swp_mkexclusive(pte_t pte)
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{
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pte_val(pte) |= _PAGE_SWP_EXCLUSIVE;
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return pte;
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}
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static inline pte_t pte_swp_clear_exclusive(pte_t pte)
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{
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pte_val(pte) &= ~_PAGE_SWP_EXCLUSIVE;
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return pte;
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}
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extern unsigned long iopa(unsigned long addr);
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/* Values for nocacheflag and cmode */
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