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habanalabs: sysfs support for two infineon versions
Currently sysfs support dumping a single infineon version, in future asics we will have two infineon versions. Signed-off-by: Ofir Bitton <obitton@habana.ai> Reviewed-by: Oded Gabbay <ogabbay@kernel.org> Signed-off-by: Oded Gabbay <ogabbay@kernel.org>
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parent
707c125286
commit
b5c92b8882
2 changed files with 17 additions and 5 deletions
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@ -163,8 +163,13 @@ static ssize_t infineon_ver_show(struct device *dev,
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{
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struct hl_device *hdev = dev_get_drvdata(dev);
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return sprintf(buf, "0x%04x\n",
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hdev->asic_prop.cpucp_info.infineon_version);
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if (hdev->asic_prop.cpucp_info.infineon_second_stage_version)
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return sprintf(buf, "%#04x %#04x\n",
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le32_to_cpu(hdev->asic_prop.cpucp_info.infineon_version),
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le32_to_cpu(hdev->asic_prop.cpucp_info.infineon_second_stage_version));
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else
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return sprintf(buf, "%#04x\n",
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le32_to_cpu(hdev->asic_prop.cpucp_info.infineon_version));
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}
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static ssize_t fuse_ver_show(struct device *dev, struct device_attribute *attr,
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@ -1,6 +1,6 @@
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/* SPDX-License-Identifier: GPL-2.0
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*
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* Copyright 2021 HabanaLabs, Ltd.
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* Copyright 2020-2021 HabanaLabs, Ltd.
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* All Rights Reserved.
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*
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*/
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@ -761,6 +761,7 @@ struct cpucp_security_info {
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* @fuse_version: silicon production FUSE information.
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* @thermal_version: thermald S/W version.
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* @cpucp_version: CpuCP S/W version.
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* @infineon_second_stage_version: Infineon 2nd stage DC-DC version.
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* @dram_size: available DRAM size.
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* @card_name: card name that will be displayed in HWMON subsystem on the host
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* @sec_info: security information
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@ -770,6 +771,10 @@ struct cpucp_security_info {
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* @dram_binning_mask: DRAM binning mask, 1 bit per dram instance
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* (0 = functional 1 = binned)
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* @memory_repair_flag: eFuse flag indicating memory repair
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* @edma_binning_mask: EDMA binning mask, 1 bit per EDMA instance
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* (0 = functional 1 = binned)
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* @xbar_binning_mask: Xbar binning mask, 1 bit per Xbar instance
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* (0 = functional 1 = binned)
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*/
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struct cpucp_info {
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struct cpucp_sensor sensors[CPUCP_MAX_SENSORS];
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@ -782,7 +787,7 @@ struct cpucp_info {
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__u8 fuse_version[VERSION_MAX_LEN];
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__u8 thermal_version[VERSION_MAX_LEN];
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__u8 cpucp_version[VERSION_MAX_LEN];
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__le32 reserved2;
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__le32 infineon_second_stage_version;
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__le64 dram_size;
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char card_name[CARD_NAME_MAX_LEN];
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__le64 reserved3;
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@ -790,7 +795,9 @@ struct cpucp_info {
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__u8 reserved5;
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__u8 dram_binning_mask;
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__u8 memory_repair_flag;
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__u8 pad[5];
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__u8 edma_binning_mask;
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__u8 xbar_binning_mask;
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__u8 pad[3];
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struct cpucp_security_info sec_info;
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__le32 reserved6;
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__u8 pll_map[PLL_MAP_LEN];
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