PCI: Add ACS quirk for more Zhaoxin Root Ports
commite367e3c765
upstream. Add more Root Port Device IDs to pci_quirk_zhaoxin_pcie_ports_acs() for some new Zhaoxin platforms. Fixes:299bd044a6
("PCI: Add ACS quirk for Zhaoxin Root/Downstream Ports") Link: https://lore.kernel.org/r/20231211091543.735903-1-LeoLiu-oc@zhaoxin.com Signed-off-by: LeoLiuoc <LeoLiu-oc@zhaoxin.com> [bhelgaas: update subject, drop changelog, add Fixes, add stable tag, fix whitespace, wrap code comment] Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Cc: <stable@vger.kernel.org> # 5.7 Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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@ -4577,17 +4577,21 @@ static int pci_quirk_xgene_acs(struct pci_dev *dev, u16 acs_flags)
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* But the implementation could block peer-to-peer transactions between them
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* and provide ACS-like functionality.
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*/
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static int pci_quirk_zhaoxin_pcie_ports_acs(struct pci_dev *dev, u16 acs_flags)
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static int pci_quirk_zhaoxin_pcie_ports_acs(struct pci_dev *dev, u16 acs_flags)
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{
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if (!pci_is_pcie(dev) ||
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((pci_pcie_type(dev) != PCI_EXP_TYPE_ROOT_PORT) &&
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(pci_pcie_type(dev) != PCI_EXP_TYPE_DOWNSTREAM)))
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return -ENOTTY;
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/*
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* Future Zhaoxin Root Ports and Switch Downstream Ports will
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* implement ACS capability in accordance with the PCIe Spec.
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*/
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switch (dev->device) {
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case 0x0710 ... 0x071e:
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case 0x0721:
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case 0x0723 ... 0x0732:
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case 0x0723 ... 0x0752:
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return pci_acs_ctrl_enabled(acs_flags,
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PCI_ACS_SV | PCI_ACS_RR | PCI_ACS_CR | PCI_ACS_UF);
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}
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