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crypto: qat - add handling of compression related errors for QAT GEN4

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Add logic to detect, report and handle correctable and uncorrectable
errors related to the compression hardware.
These are detected through the EXPRPSSMXLT, EXPRPSSMCPR and EXPRPSSMDCPR
registers.

Signed-off-by: Shashank Gupta <shashank.gupta@intel.com>
Reviewed-by: Giovanni Cabiddu <giovanni.cabiddu@intel.com>
Reviewed-by: Tero Kristo <tero.kristo@linux.intel.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
This commit is contained in:
Shashank Gupta 2023-10-20 11:32:49 +01:00 committed by Herbert Xu
parent 895f7d532c
commit b67bf7babe
2 changed files with 151 additions and 1 deletions
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76
drivers/crypto/intel/qat/qat_common/adf_gen4_ras.c
View file

@ -996,13 +996,87 @@ static bool adf_handle_iaintstatssm(struct adf_accel_dev *accel_dev,
return reset_required;
}
static bool adf_handle_exprpssmcmpr(struct adf_accel_dev *accel_dev,
void __iomem *csr)
{
u32 reg = ADF_CSR_RD(csr, ADF_GEN4_EXPRPSSMCPR);
reg &= ADF_GEN4_EXPRPSSMCPR_UNCERR_BITMASK;
if (!reg)
return false;
dev_err(&GET_DEV(accel_dev),
"Uncorrectable error exception in SSM CMP: 0x%x", reg);
ADF_CSR_WR(csr, ADF_GEN4_EXPRPSSMCPR, reg);
return false;
}
static bool adf_handle_exprpssmxlt(struct adf_accel_dev *accel_dev,
void __iomem *csr)
{
u32 reg = ADF_CSR_RD(csr, ADF_GEN4_EXPRPSSMXLT);
reg &= ADF_GEN4_EXPRPSSMXLT_UNCERR_BITMASK |
ADF_GEN4_EXPRPSSMXLT_CERR_BIT;
if (!reg)
return false;
if (reg & ADF_GEN4_EXPRPSSMXLT_UNCERR_BITMASK)
dev_err(&GET_DEV(accel_dev),
"Uncorrectable error exception in SSM XLT: 0x%x", reg);
if (reg & ADF_GEN4_EXPRPSSMXLT_CERR_BIT)
dev_warn(&GET_DEV(accel_dev),
"Correctable error exception in SSM XLT: 0x%x", reg);
ADF_CSR_WR(csr, ADF_GEN4_EXPRPSSMXLT, reg);
return false;
}
static bool adf_handle_exprpssmdcpr(struct adf_accel_dev *accel_dev,
void __iomem *csr)
{
u32 reg;
int i;
for (i = 0; i < ADF_GEN4_DCPR_SLICES_NUM; i++) {
reg = ADF_CSR_RD(csr, ADF_GEN4_EXPRPSSMDCPR(i));
reg &= ADF_GEN4_EXPRPSSMDCPR_UNCERR_BITMASK |
ADF_GEN4_EXPRPSSMDCPR_CERR_BITMASK;
if (!reg)
continue;
if (reg & ADF_GEN4_EXPRPSSMDCPR_UNCERR_BITMASK)
dev_err(&GET_DEV(accel_dev),
"Uncorrectable error exception in SSM DCMP: 0x%x", reg);
if (reg & ADF_GEN4_EXPRPSSMDCPR_CERR_BITMASK)
dev_warn(&GET_DEV(accel_dev),
"Correctable error exception in SSM DCMP: 0x%x", reg);
ADF_CSR_WR(csr, ADF_GEN4_EXPRPSSMDCPR(i), reg);
}
return false;
}
static bool adf_handle_ssm(struct adf_accel_dev *accel_dev, void __iomem *csr,
u32 errsou)
{
bool reset_required;
if (!(errsou & ADF_GEN4_ERRSOU2_SSM_ERR_BIT))
return false;
return adf_handle_iaintstatssm(accel_dev, csr);
reset_required = adf_handle_iaintstatssm(accel_dev, csr);
reset_required |= adf_handle_exprpssmcmpr(accel_dev, csr);
reset_required |= adf_handle_exprpssmxlt(accel_dev, csr);
reset_required |= adf_handle_exprpssmdcpr(accel_dev, csr);
return reset_required;
}
static bool adf_handle_cpp_cfc_err(struct adf_accel_dev *accel_dev,

76
drivers/crypto/intel/qat/qat_common/adf_gen4_ras.h
View file

@ -523,6 +523,82 @@ struct adf_ras_ops;
#define ADF_GEN4_CPP_CFC_ERR_PPID_LO 0x640C0C
#define ADF_GEN4_CPP_CFC_ERR_PPID_HI 0x640C10
/* Exception reporting in QAT SSM CMP */
#define ADF_GEN4_EXPRPSSMCPR 0x2000
/*
* Uncorrectable error mask in EXPRPSSMCPR
* BIT(2) - Hard fatal error
* BIT(16) - Parity error detected in CPR Push FIFO
* BIT(17) - Parity error detected in CPR Pull FIFO
* BIT(18) - Parity error detected in CPR Hash Table
* BIT(19) - Parity error detected in CPR History Buffer Copy 0
* BIT(20) - Parity error detected in CPR History Buffer Copy 1
* BIT(21) - Parity error detected in CPR History Buffer Copy 2
* BIT(22) - Parity error detected in CPR History Buffer Copy 3
* BIT(23) - Parity error detected in CPR History Buffer Copy 4
* BIT(24) - Parity error detected in CPR History Buffer Copy 5
* BIT(25) - Parity error detected in CPR History Buffer Copy 6
* BIT(26) - Parity error detected in CPR History Buffer Copy 7
*/
#define ADF_GEN4_EXPRPSSMCPR_UNCERR_BITMASK \
(BIT(2) | BIT(16) | BIT(17) | BIT(18) | BIT(19) | BIT(20) | \
BIT(21) | BIT(22) | BIT(23) | BIT(24) | BIT(25) | BIT(26))
/* Exception reporting in QAT SSM XLT */
#define ADF_GEN4_EXPRPSSMXLT 0xA000
/*
* Uncorrectable error mask in EXPRPSSMXLT
* BIT(2) - If set, an Uncorrectable Error event occurred
* BIT(16) - Parity error detected in XLT Push FIFO
* BIT(17) - Parity error detected in XLT Pull FIFO
* BIT(18) - Parity error detected in XLT HCTB0
* BIT(19) - Parity error detected in XLT HCTB1
* BIT(20) - Parity error detected in XLT HCTB2
* BIT(21) - Parity error detected in XLT HCTB3
* BIT(22) - Parity error detected in XLT CBCL
* BIT(23) - Parity error detected in XLT LITPTR
*/
#define ADF_GEN4_EXPRPSSMXLT_UNCERR_BITMASK \
(BIT(2) | BIT(16) | BIT(17) | BIT(18) | BIT(19) | BIT(20) | BIT(21) | \
BIT(22) | BIT(23))
/*
* Correctable error mask in EXPRPSSMXLT
* BIT(3) - Correctable error event occurred.
*/
#define ADF_GEN4_EXPRPSSMXLT_CERR_BIT BIT(3)
/* Exception reporting in QAT SSM DCMP */
#define ADF_GEN4_EXPRPSSMDCPR(_n_) (0x12000 + (_n_) * 0x80)
/*
* Uncorrectable error mask in EXPRPSSMDCPR
* BIT(2) - Even hard fatal error
* BIT(4) - Odd hard fatal error
* BIT(6) - decode soft error
* BIT(16) - Parity error detected in CPR Push FIFO
* BIT(17) - Parity error detected in CPR Pull FIFO
* BIT(18) - Parity error detected in the Input Buffer
* BIT(19) - symbuf0parerr
* Parity error detected in CPR Push FIFO
* BIT(20) - symbuf1parerr
* Parity error detected in CPR Push FIFO
*/
#define ADF_GEN4_EXPRPSSMDCPR_UNCERR_BITMASK \
(BIT(2) | BIT(4) | BIT(6) | BIT(16) | BIT(17) | \
BIT(18) | BIT(19) | BIT(20))
/*
* Correctable error mask in EXPRPSSMDCPR
* BIT(3) - Even ecc correctable error
* BIT(5) - Odd ecc correctable error
*/
#define ADF_GEN4_EXPRPSSMDCPR_CERR_BITMASK (BIT(3) | BIT(5))
#define ADF_GEN4_DCPR_SLICES_NUM 3
/* Command Parity error detected on IOSFP Command to QAT */
#define ADF_GEN4_RIMISCSTS_BIT BIT(0)