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drm/amdgpu: wire up emit_wreg for UVD v7
Needed for vm_flush unification. Signed-off-by: Christian König <christian.koenig@amd.com> Acked-by: Chunming Zhou <david1.zhou@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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252998986a
commit
b6cb3b5c13
1 changed files with 17 additions and 7 deletions
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@ -1255,17 +1255,17 @@ static void uvd_v7_0_enc_ring_emit_ib(struct amdgpu_ring *ring,
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amdgpu_ring_write(ring, ib->length_dw);
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}
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static void uvd_v7_0_vm_reg_write(struct amdgpu_ring *ring,
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uint32_t data0, uint32_t data1)
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static void uvd_v7_0_ring_emit_wreg(struct amdgpu_ring *ring,
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uint32_t reg, uint32_t val)
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{
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struct amdgpu_device *adev = ring->adev;
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amdgpu_ring_write(ring,
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PACKET0(SOC15_REG_OFFSET(UVD, 0, mmUVD_GPCOM_VCPU_DATA0), 0));
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amdgpu_ring_write(ring, data0);
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amdgpu_ring_write(ring, reg << 2);
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amdgpu_ring_write(ring,
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PACKET0(SOC15_REG_OFFSET(UVD, 0, mmUVD_GPCOM_VCPU_DATA1), 0));
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amdgpu_ring_write(ring, data1);
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amdgpu_ring_write(ring, val);
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amdgpu_ring_write(ring,
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PACKET0(SOC15_REG_OFFSET(UVD, 0, mmUVD_GPCOM_VCPU_CMD), 0));
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amdgpu_ring_write(ring, 8);
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@ -1305,11 +1305,11 @@ static void uvd_v7_0_ring_emit_vm_flush(struct amdgpu_ring *ring,
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data0 = (hub->ctx0_ptb_addr_hi32 + vmid * 2) << 2;
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data1 = upper_32_bits(pd_addr);
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uvd_v7_0_vm_reg_write(ring, data0, data1);
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uvd_v7_0_ring_emit_wreg(ring, data0, data1);
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data0 = (hub->ctx0_ptb_addr_lo32 + vmid * 2) << 2;
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data1 = lower_32_bits(pd_addr);
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uvd_v7_0_vm_reg_write(ring, data0, data1);
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uvd_v7_0_ring_emit_wreg(ring, data0, data1);
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data0 = (hub->ctx0_ptb_addr_lo32 + vmid * 2) << 2;
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data1 = lower_32_bits(pd_addr);
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@ -1319,7 +1319,7 @@ static void uvd_v7_0_ring_emit_vm_flush(struct amdgpu_ring *ring,
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/* flush TLB */
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data0 = (hub->vm_inv_eng0_req + eng) << 2;
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data1 = req;
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uvd_v7_0_vm_reg_write(ring, data0, data1);
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uvd_v7_0_ring_emit_wreg(ring, data0, data1);
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/* wait for flush */
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data0 = (hub->vm_inv_eng0_ack + eng) << 2;
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@ -1380,6 +1380,14 @@ static void uvd_v7_0_enc_ring_emit_vm_flush(struct amdgpu_ring *ring,
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amdgpu_ring_write(ring, 1 << vmid);
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}
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static void uvd_v7_0_enc_ring_emit_wreg(struct amdgpu_ring *ring,
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uint32_t reg, uint32_t val)
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{
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amdgpu_ring_write(ring, HEVC_ENC_CMD_REG_WRITE);
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amdgpu_ring_write(ring, reg << 2);
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amdgpu_ring_write(ring, val);
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}
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#if 0
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static bool uvd_v7_0_is_idle(void *handle)
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{
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@ -1730,6 +1738,7 @@ static const struct amdgpu_ring_funcs uvd_v7_0_ring_vm_funcs = {
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.pad_ib = amdgpu_ring_generic_pad_ib,
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.begin_use = amdgpu_uvd_ring_begin_use,
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.end_use = amdgpu_uvd_ring_end_use,
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.emit_wreg = uvd_v7_0_ring_emit_wreg,
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};
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static const struct amdgpu_ring_funcs uvd_v7_0_enc_ring_vm_funcs = {
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@ -1756,6 +1765,7 @@ static const struct amdgpu_ring_funcs uvd_v7_0_enc_ring_vm_funcs = {
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.pad_ib = amdgpu_ring_generic_pad_ib,
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.begin_use = amdgpu_uvd_ring_begin_use,
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.end_use = amdgpu_uvd_ring_end_use,
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.emit_wreg = uvd_v7_0_enc_ring_emit_wreg,
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};
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static void uvd_v7_0_set_ring_funcs(struct amdgpu_device *adev)
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