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ARM: ixp4xx: Delete the Freecom FSG-3 boardfiles
This board is replaced with the corresponding device tree. Acked-by: Marc Zyngier <maz@kernel.org> Tested-by: Marc Zyngier <maz@kernel.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This commit is contained in:
Linus Walleij
parent
df412c3560
commit
b71377b3e1
4 changed files with 0 additions and 395 deletions
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@ -38,15 +38,6 @@ config ARCH_PRPMC1100
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PrPCM1100 Processor Mezanine Module. For more information on
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this platform, see <file:Documentation/arm/ixp4xx.rst>.
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config MACH_FSG
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bool
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prompt "Freecom FSG-3"
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depends on IXP4XX_PCI_LEGACY
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help
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Say 'Y' here if you want your kernel to support Freecom's
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FSG-3 device. For more information on this platform,
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see http://www.nslu2-linux.org/wiki/FSG3/HomePage
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#
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# Certain registers and IRQs are only enabled if supporting IXP465 CPUs
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#
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@ -10,12 +10,10 @@ obj-pci-n :=
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obj-pci-$(CONFIG_MACH_IXP4XX_OF) += ixp4xx-of.o
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obj-pci-$(CONFIG_MACH_GATEWAY7001) += gateway7001-pci.o
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obj-pci-$(CONFIG_MACH_FSG) += fsg-pci.o
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obj-y += common.o
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obj-$(CONFIG_MACH_GATEWAY7001) += gateway7001-setup.o
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obj-$(CONFIG_MACH_FSG) += fsg-setup.o
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obj-$(CONFIG_MACH_GORAMO_MLR) += goramo_mlr.o
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obj-$(CONFIG_PCI) += $(obj-pci-$(CONFIG_PCI)) common-pci.o
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@ -1,73 +0,0 @@
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// SPDX-License-Identifier: GPL-2.0-only
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/*
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* arch/arch/mach-ixp4xx/fsg-pci.c
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*
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* FSG board-level PCI initialization
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*
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* Author: Rod Whitby <rod@whitby.id.au>
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* Maintainer: http://www.nslu2-linux.org/
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*
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* based on ixdp425-pci.c:
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* Copyright (C) 2002 Intel Corporation.
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* Copyright (C) 2003-2004 MontaVista Software, Inc.
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*/
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#include <linux/pci.h>
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#include <linux/init.h>
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#include <linux/irq.h>
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#include <asm/mach/pci.h>
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#include <asm/mach-types.h>
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#include "irqs.h"
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#define MAX_DEV 3
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#define IRQ_LINES 3
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/* PCI controller GPIO to IRQ pin mappings */
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#define INTA 6
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#define INTB 7
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#define INTC 5
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void __init fsg_pci_preinit(void)
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{
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irq_set_irq_type(IXP4XX_GPIO_IRQ(INTA), IRQ_TYPE_LEVEL_LOW);
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irq_set_irq_type(IXP4XX_GPIO_IRQ(INTB), IRQ_TYPE_LEVEL_LOW);
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irq_set_irq_type(IXP4XX_GPIO_IRQ(INTC), IRQ_TYPE_LEVEL_LOW);
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ixp4xx_pci_preinit();
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}
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static int __init fsg_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
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{
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static int pci_irq_table[IRQ_LINES] = {
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IXP4XX_GPIO_IRQ(INTC),
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IXP4XX_GPIO_IRQ(INTB),
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IXP4XX_GPIO_IRQ(INTA),
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};
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int irq = -1;
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slot -= 11;
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if (slot >= 1 && slot <= MAX_DEV && pin >= 1 && pin <= IRQ_LINES)
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irq = pci_irq_table[slot - 1];
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printk(KERN_INFO "%s: Mapped slot %d pin %d to IRQ %d\n",
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__func__, slot, pin, irq);
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return irq;
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}
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struct hw_pci fsg_pci __initdata = {
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.nr_controllers = 1,
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.ops = &ixp4xx_ops,
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.preinit = fsg_pci_preinit,
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.setup = ixp4xx_setup,
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.map_irq = fsg_map_irq,
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};
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int __init fsg_pci_init(void)
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{
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if (machine_is_fsg())
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pci_common_init(&fsg_pci);
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return 0;
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}
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subsys_initcall(fsg_pci_init);
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@ -1,311 +0,0 @@
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// SPDX-License-Identifier: GPL-2.0
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/*
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* arch/arm/mach-ixp4xx/fsg-setup.c
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*
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* FSG board-setup
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*
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* Copyright (C) 2008 Rod Whitby <rod@whitby.id.au>
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*
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* based on ixdp425-setup.c:
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* Copyright (C) 2003-2004 MontaVista Software, Inc.
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* based on nslu2-power.c
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* Copyright (C) 2005 Tower Technologies
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*
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* Author: Rod Whitby <rod@whitby.id.au>
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* Maintainers: http://www.nslu2-linux.org/
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*
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*/
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#include <linux/gpio.h>
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#include <linux/if_ether.h>
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#include <linux/irq.h>
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#include <linux/serial.h>
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#include <linux/serial_8250.h>
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#include <linux/leds.h>
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#include <linux/reboot.h>
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#include <linux/i2c.h>
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#include <linux/gpio/machine.h>
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#include <linux/io.h>
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#include <asm/mach-types.h>
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#include <asm/mach/arch.h>
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#include <asm/mach/flash.h>
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#include <mach/hardware.h>
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#include "irqs.h"
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#define FSG_SDA_PIN 12
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#define FSG_SCL_PIN 13
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#define FSG_SB_GPIO 4 /* sync button */
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#define FSG_RB_GPIO 9 /* reset button */
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#define FSG_UB_GPIO 10 /* usb button */
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static struct flash_platform_data fsg_flash_data = {
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.map_name = "cfi_probe",
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.width = 2,
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};
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static struct resource fsg_flash_resource = {
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.flags = IORESOURCE_MEM,
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};
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static struct platform_device fsg_flash = {
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.name = "IXP4XX-Flash",
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.id = 0,
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.dev = {
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.platform_data = &fsg_flash_data,
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},
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.num_resources = 1,
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.resource = &fsg_flash_resource,
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};
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static struct gpiod_lookup_table fsg_i2c_gpiod_table = {
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.dev_id = "i2c-gpio.0",
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.table = {
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GPIO_LOOKUP_IDX("IXP4XX_GPIO_CHIP", FSG_SDA_PIN,
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NULL, 0, GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN),
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GPIO_LOOKUP_IDX("IXP4XX_GPIO_CHIP", FSG_SCL_PIN,
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NULL, 1, GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN),
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},
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};
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static struct platform_device fsg_i2c_gpio = {
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.name = "i2c-gpio",
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.id = 0,
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.dev = {
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.platform_data = NULL,
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},
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};
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static struct i2c_board_info __initdata fsg_i2c_board_info [] = {
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{
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I2C_BOARD_INFO("isl1208", 0x6f),
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},
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};
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static struct resource fsg_uart_resources[] = {
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{
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.start = IXP4XX_UART1_BASE_PHYS,
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.end = IXP4XX_UART1_BASE_PHYS + 0x0fff,
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.flags = IORESOURCE_MEM,
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},
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{
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.start = IXP4XX_UART2_BASE_PHYS,
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.end = IXP4XX_UART2_BASE_PHYS + 0x0fff,
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.flags = IORESOURCE_MEM,
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}
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};
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static struct plat_serial8250_port fsg_uart_data[] = {
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{
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.mapbase = IXP4XX_UART1_BASE_PHYS,
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.membase = (char *)IXP4XX_UART1_BASE_VIRT + REG_OFFSET,
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.irq = IRQ_IXP4XX_UART1,
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.flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
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.iotype = UPIO_MEM,
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.regshift = 2,
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.uartclk = IXP4XX_UART_XTAL,
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},
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{
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.mapbase = IXP4XX_UART2_BASE_PHYS,
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.membase = (char *)IXP4XX_UART2_BASE_VIRT + REG_OFFSET,
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.irq = IRQ_IXP4XX_UART2,
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.flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
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.iotype = UPIO_MEM,
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.regshift = 2,
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.uartclk = IXP4XX_UART_XTAL,
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},
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{ }
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};
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static struct platform_device fsg_uart = {
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.name = "serial8250",
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.id = PLAT8250_DEV_PLATFORM,
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.dev = {
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.platform_data = fsg_uart_data,
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},
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.num_resources = ARRAY_SIZE(fsg_uart_resources),
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.resource = fsg_uart_resources,
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};
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static struct platform_device fsg_leds = {
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.name = "fsg-led",
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.id = -1,
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};
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/* Built-in 10/100 Ethernet MAC interfaces */
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static struct resource fsg_eth_npeb_resources[] = {
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{
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.start = IXP4XX_EthB_BASE_PHYS,
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.end = IXP4XX_EthB_BASE_PHYS + 0x0fff,
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.flags = IORESOURCE_MEM,
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},
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};
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static struct resource fsg_eth_npec_resources[] = {
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{
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.start = IXP4XX_EthC_BASE_PHYS,
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.end = IXP4XX_EthC_BASE_PHYS + 0x0fff,
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.flags = IORESOURCE_MEM,
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},
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};
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static struct eth_plat_info fsg_plat_eth[] = {
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{
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.phy = 5,
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.rxq = 3,
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.txreadyq = 20,
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}, {
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.phy = 4,
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.rxq = 4,
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.txreadyq = 21,
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}
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};
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static struct platform_device fsg_eth[] = {
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{
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.name = "ixp4xx_eth",
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.id = IXP4XX_ETH_NPEB,
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.dev = {
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.platform_data = fsg_plat_eth,
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},
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.num_resources = ARRAY_SIZE(fsg_eth_npeb_resources),
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.resource = fsg_eth_npeb_resources,
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}, {
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.name = "ixp4xx_eth",
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.id = IXP4XX_ETH_NPEC,
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.dev = {
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.platform_data = fsg_plat_eth + 1,
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},
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.num_resources = ARRAY_SIZE(fsg_eth_npec_resources),
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.resource = fsg_eth_npec_resources,
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}
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};
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static struct platform_device *fsg_devices[] __initdata = {
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&fsg_i2c_gpio,
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&fsg_flash,
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&fsg_leds,
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&fsg_eth[0],
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&fsg_eth[1],
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};
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static irqreturn_t fsg_power_handler(int irq, void *dev_id)
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{
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/* Signal init to do the ctrlaltdel action, this will bypass init if
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* it hasn't started and do a kernel_restart.
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*/
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ctrl_alt_del();
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return IRQ_HANDLED;
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}
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static irqreturn_t fsg_reset_handler(int irq, void *dev_id)
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{
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/* This is the paper-clip reset which does an emergency reboot. */
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printk(KERN_INFO "Restarting system.\n");
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machine_restart(NULL);
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/* This should never be reached. */
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return IRQ_HANDLED;
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}
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static void __init fsg_init(void)
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{
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uint8_t __iomem *f;
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ixp4xx_sys_init();
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fsg_flash_resource.start = IXP4XX_EXP_BUS_BASE(0);
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fsg_flash_resource.end =
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IXP4XX_EXP_BUS_BASE(0) + ixp4xx_exp_bus_size - 1;
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*IXP4XX_EXP_CS0 |= IXP4XX_FLASH_WRITABLE;
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*IXP4XX_EXP_CS1 = *IXP4XX_EXP_CS0;
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/* Configure CS2 for operation, 8bit and writable */
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*IXP4XX_EXP_CS2 = 0xbfff0002;
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gpiod_add_lookup_table(&fsg_i2c_gpiod_table);
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i2c_register_board_info(0, fsg_i2c_board_info,
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ARRAY_SIZE(fsg_i2c_board_info));
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/* This is only useful on a modified machine, but it is valuable
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* to have it first in order to see debug messages, and so that
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* it does *not* get removed if platform_add_devices fails!
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*/
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(void)platform_device_register(&fsg_uart);
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platform_add_devices(fsg_devices, ARRAY_SIZE(fsg_devices));
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if (request_irq(gpio_to_irq(FSG_RB_GPIO), &fsg_reset_handler,
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IRQF_TRIGGER_LOW, "FSG reset button", NULL) < 0) {
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printk(KERN_DEBUG "Reset Button IRQ %d not available\n",
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gpio_to_irq(FSG_RB_GPIO));
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}
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if (request_irq(gpio_to_irq(FSG_SB_GPIO), &fsg_power_handler,
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IRQF_TRIGGER_LOW, "FSG power button", NULL) < 0) {
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printk(KERN_DEBUG "Power Button IRQ %d not available\n",
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gpio_to_irq(FSG_SB_GPIO));
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}
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/*
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* Map in a portion of the flash and read the MAC addresses.
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* Since it is stored in BE in the flash itself, we need to
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* byteswap it if we're in LE mode.
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*/
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f = ioremap(IXP4XX_EXP_BUS_BASE(0), 0x400000);
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if (f) {
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#ifdef __ARMEB__
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int i;
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for (i = 0; i < 6; i++) {
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fsg_plat_eth[0].hwaddr[i] = readb(f + 0x3C0422 + i);
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fsg_plat_eth[1].hwaddr[i] = readb(f + 0x3C043B + i);
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}
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#else
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/*
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Endian-swapped reads from unaligned addresses are
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required to extract the two MACs from the big-endian
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Redboot config area in flash.
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*/
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fsg_plat_eth[0].hwaddr[0] = readb(f + 0x3C0421);
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fsg_plat_eth[0].hwaddr[1] = readb(f + 0x3C0420);
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fsg_plat_eth[0].hwaddr[2] = readb(f + 0x3C0427);
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fsg_plat_eth[0].hwaddr[3] = readb(f + 0x3C0426);
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fsg_plat_eth[0].hwaddr[4] = readb(f + 0x3C0425);
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fsg_plat_eth[0].hwaddr[5] = readb(f + 0x3C0424);
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fsg_plat_eth[1].hwaddr[0] = readb(f + 0x3C0439);
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fsg_plat_eth[1].hwaddr[1] = readb(f + 0x3C043F);
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fsg_plat_eth[1].hwaddr[2] = readb(f + 0x3C043E);
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fsg_plat_eth[1].hwaddr[3] = readb(f + 0x3C043D);
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fsg_plat_eth[1].hwaddr[4] = readb(f + 0x3C043C);
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fsg_plat_eth[1].hwaddr[5] = readb(f + 0x3C0443);
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#endif
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iounmap(f);
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}
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printk(KERN_INFO "FSG: Using MAC address %pM for port 0\n",
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fsg_plat_eth[0].hwaddr);
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printk(KERN_INFO "FSG: Using MAC address %pM for port 1\n",
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fsg_plat_eth[1].hwaddr);
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}
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MACHINE_START(FSG, "Freecom FSG-3")
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/* Maintainer: www.nslu2-linux.org */
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.map_io = ixp4xx_map_io,
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.init_early = ixp4xx_init_early,
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.init_irq = ixp4xx_init_irq,
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.init_time = ixp4xx_timer_init,
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.atag_offset = 0x100,
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.init_machine = fsg_init,
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#if defined(CONFIG_PCI)
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.dma_zone_size = SZ_64M,
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#endif
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.restart = ixp4xx_restart,
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MACHINE_END
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