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riscv: Fix udelay in RV32.
[ Upstream commit d0e1f2110a
]
In RV32, udelay would delay the wrong cycle. When it shifts right
"UDELAY_SHIFT" bits, it either delays 0 cycle or 1 cycle. It only works
correctly in RV64. Because the 'ucycles' always needs to be 64 bits
variable.
Signed-off-by: Nick Hu <nickhu@andestech.com>
Reviewed-by: Palmer Dabbelt <palmer@sifive.com>
[paul.walmsley@sifive.com: fixed minor spelling error]
Signed-off-by: Paul Walmsley <paul.walmsley@sifive.com>
Signed-off-by: Sasha Levin <sashal@kernel.org>
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1 changed files with 1 additions and 1 deletions
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@ -88,7 +88,7 @@ EXPORT_SYMBOL(__delay);
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void udelay(unsigned long usecs)
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{
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unsigned long ucycles = usecs * lpj_fine * UDELAY_MULT;
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u64 ucycles = (u64)usecs * lpj_fine * UDELAY_MULT;
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if (unlikely(usecs > MAX_UDELAY_US)) {
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__delay((u64)usecs * riscv_timebase / 1000000ULL);
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