spi: spi-loopback-test: Add test to trigger DMA/PIO mixing

Add a test where a small and a large transfer in a message hit the same
cache line.  This test currently fails on spi-s3c64xx on in DMA mode
since it ends up mixing DMA and PIO without proper cache maintenance.

Signed-off-by: Vincent Whitchurch <vincent.whitchurch@axis.com>
Link: https://lore.kernel.org/r/20220916113951.228398-2-vincent.whitchurch@axis.com
Signed-off-by: Mark Brown <broonie@kernel.org>
This commit is contained in:
Vincent Whitchurch 2022-09-16 13:39:48 +02:00 committed by Mark Brown
parent f4ca8c88c2
commit b85ad8a54e
No known key found for this signature in database
GPG key ID: 24D68B725D5487D0

View file

@ -313,6 +313,33 @@ static struct spi_test spi_tests[] = {
},
},
},
{
.description = "three tx+rx transfers with overlapping cache lines",
.fill_option = FILL_COUNT_8,
/*
* This should be large enough for the controller driver to
* choose to transfer it with DMA.
*/
.iterate_len = { 512, -1 },
.iterate_transfer_mask = BIT(1),
.transfer_count = 3,
.transfers = {
{
.len = 1,
.tx_buf = TX(0),
.rx_buf = RX(0),
},
{
.tx_buf = TX(1),
.rx_buf = RX(1),
},
{
.len = 1,
.tx_buf = TX(513),
.rx_buf = RX(513),
},
},
},
{ /* end of tests sequence */ }
};