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clk: renesas: r8a73a4: Always use readl()/writel()
On arm32, there is no reason to use the (soon deprecated) clk_readl()/clk_writel(). Hence use the generic readl()/writel() instead. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
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parent
8027519840
commit
b86b493eb2
1 changed files with 5 additions and 6 deletions
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@ -71,7 +71,7 @@ r8a73a4_cpg_register_clock(struct device_node *np, struct r8a73a4_cpg *cpg,
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if (!strcmp(name, "main")) {
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u32 ckscr = clk_readl(cpg->reg + CPG_CKSCR);
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u32 ckscr = readl(cpg->reg + CPG_CKSCR);
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switch ((ckscr >> 28) & 3) {
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case 0: /* extal1 */
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@ -95,14 +95,14 @@ r8a73a4_cpg_register_clock(struct device_node *np, struct r8a73a4_cpg *cpg,
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* clock implementation and we currently have no need to change
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* the multiplier value.
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*/
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u32 value = clk_readl(cpg->reg + CPG_PLL0CR);
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u32 value = readl(cpg->reg + CPG_PLL0CR);
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parent_name = "main";
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mult = ((value >> 24) & 0x7f) + 1;
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if (value & BIT(20))
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div = 2;
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} else if (!strcmp(name, "pll1")) {
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u32 value = clk_readl(cpg->reg + CPG_PLL1CR);
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u32 value = readl(cpg->reg + CPG_PLL1CR);
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parent_name = "main";
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/* XXX: enable bit? */
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@ -125,7 +125,7 @@ r8a73a4_cpg_register_clock(struct device_node *np, struct r8a73a4_cpg *cpg,
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default:
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return ERR_PTR(-EINVAL);
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}
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value = clk_readl(cpg->reg + cr);
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value = readl(cpg->reg + cr);
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switch ((value >> 5) & 7) {
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case 0:
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parent_name = "main";
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@ -161,8 +161,7 @@ r8a73a4_cpg_register_clock(struct device_node *np, struct r8a73a4_cpg *cpg,
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shift = 0;
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}
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div *= 32;
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mult = 0x20 - ((clk_readl(cpg->reg + CPG_FRQCRC) >> shift)
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& 0x1f);
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mult = 0x20 - ((readl(cpg->reg + CPG_FRQCRC) >> shift) & 0x1f);
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} else {
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struct div4_clk *c;
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