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arm64: dts: qcom: msm8996: correct #clock-cells for QMP PHY nodes
The commit82d61e19fc
("arm64: dts: qcom: msm8996: Move '#clock-cells' to QMP PHY child node") moved the '#clock-cells' properties to the child nodes. However it missed the fact that the property must have been set to <0> (as all pipe clocks use of_clk_hw_simple_get as the xlate function. Also the mentioned commit didn't add '#clock-cells' properties to second and third PCIe PHY nodes. Correct both these mistakes: - Set '#clock-cells' to <0>, - Add the property to pciephy_1 and pciephy_2 nodes. Fixes:82d61e19fc
("arm64: dts: qcom: msm8996: Move '#clock-cells' to QMP PHY child node") Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220620071936.1558906-3-dmitry.baryshkov@linaro.org
This commit is contained in:
parent
8b936253e3
commit
b874fff9a7
1 changed files with 4 additions and 2 deletions
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@ -610,7 +610,7 @@ pciephy_0: phy@35000 {
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<0x00035400 0x1dc>;
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#phy-cells = <0>;
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#clock-cells = <1>;
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#clock-cells = <0>;
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clock-output-names = "pcie_0_pipe_clk_src";
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clocks = <&gcc GCC_PCIE_0_PIPE_CLK>;
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clock-names = "pipe0";
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@ -624,6 +624,7 @@ pciephy_1: phy@36000 {
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<0x00036400 0x1dc>;
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#phy-cells = <0>;
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#clock-cells = <0>;
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clock-output-names = "pcie_1_pipe_clk_src";
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clocks = <&gcc GCC_PCIE_1_PIPE_CLK>;
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clock-names = "pipe1";
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@ -637,6 +638,7 @@ pciephy_2: phy@37000 {
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<0x00037400 0x1dc>;
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#phy-cells = <0>;
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#clock-cells = <0>;
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clock-output-names = "pcie_2_pipe_clk_src";
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clocks = <&gcc GCC_PCIE_2_PIPE_CLK>;
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clock-names = "pipe2";
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@ -2951,7 +2953,7 @@ ssusb_phy_0: phy@7410200 {
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<0x07410600 0x1a8>;
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#phy-cells = <0>;
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#clock-cells = <1>;
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#clock-cells = <0>;
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clock-output-names = "usb3_phy_pipe_clk_src";
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clocks = <&gcc GCC_USB3_PHY_PIPE_CLK>;
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clock-names = "pipe0";
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