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drm/amd/display: add plane CTM driver-specific property
Plane CTM for pre-blending color space conversion. Only enable driver-specific plane CTM property on drivers that support both pre- and post-blending gamut remap matrix, i.e., DCN3+ family. Otherwise it conflits with DRM CRTC CTM property. Reviewed-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Melissa Wen <mwen@igalia.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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4 changed files with 37 additions and 0 deletions
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@ -364,6 +364,8 @@ struct amdgpu_mode_info {
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* @plane_hdr_mult_property:
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*/
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struct drm_property *plane_hdr_mult_property;
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struct drm_property *plane_ctm_property;
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/**
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* @shaper_lut_property: Plane property to set pre-blending shaper LUT
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* that converts color content before 3D LUT. If
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@ -784,6 +784,13 @@ struct dm_plane_state {
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* TF is needed for any subsequent linear-to-non-linear transforms.
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*/
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__u64 hdr_mult;
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/**
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* @ctm:
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*
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* Color transformation matrix. The blob (if not NULL) is a &struct
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* drm_color_ctm_3x4.
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*/
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struct drm_property_blob *ctm;
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/**
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* @shaper_lut: shaper lookup table blob. The blob (if not NULL) is an
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* array of &struct drm_color_lut.
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@ -240,6 +240,13 @@ amdgpu_dm_create_color_properties(struct amdgpu_device *adev)
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return -ENOMEM;
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adev->mode_info.plane_hdr_mult_property = prop;
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prop = drm_property_create(adev_to_drm(adev),
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DRM_MODE_PROP_BLOB,
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"AMD_PLANE_CTM", 0);
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if (!prop)
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return -ENOMEM;
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adev->mode_info.plane_ctm_property = prop;
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prop = drm_property_create(adev_to_drm(adev),
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DRM_MODE_PROP_BLOB,
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"AMD_PLANE_SHAPER_LUT", 0);
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@ -1366,6 +1366,9 @@ static struct drm_plane_state *amdgpu_dm_plane_drm_plane_duplicate_state(struct
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if (old_dm_plane_state->degamma_lut)
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dm_plane_state->degamma_lut =
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drm_property_blob_get(old_dm_plane_state->degamma_lut);
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if (old_dm_plane_state->ctm)
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dm_plane_state->ctm =
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drm_property_blob_get(old_dm_plane_state->ctm);
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if (old_dm_plane_state->shaper_lut)
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dm_plane_state->shaper_lut =
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drm_property_blob_get(old_dm_plane_state->shaper_lut);
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@ -1450,6 +1453,8 @@ static void amdgpu_dm_plane_drm_plane_destroy_state(struct drm_plane *plane,
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if (dm_plane_state->degamma_lut)
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drm_property_blob_put(dm_plane_state->degamma_lut);
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if (dm_plane_state->ctm)
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drm_property_blob_put(dm_plane_state->ctm);
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if (dm_plane_state->lut3d)
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drm_property_blob_put(dm_plane_state->lut3d);
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if (dm_plane_state->shaper_lut)
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@ -1490,6 +1495,11 @@ dm_atomic_plane_attach_color_mgmt_properties(struct amdgpu_display_manager *dm,
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dm->adev->mode_info.plane_hdr_mult_property,
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AMDGPU_HDR_MULT_DEFAULT);
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/* Only enable plane CTM if both DPP and MPC gamut remap is available. */
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if (dm->dc->caps.color.mpc.gamut_remap)
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drm_object_attach_property(&plane->base,
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dm->adev->mode_info.plane_ctm_property, 0);
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if (dpp_color_caps.hw_3d_lut) {
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drm_object_attach_property(&plane->base,
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mode_info.plane_shaper_lut_property, 0);
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@ -1547,6 +1557,14 @@ dm_atomic_plane_set_property(struct drm_plane *plane,
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dm_plane_state->hdr_mult = val;
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dm_plane_state->base.color_mgmt_changed = 1;
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}
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} else if (property == adev->mode_info.plane_ctm_property) {
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ret = drm_property_replace_blob_from_id(plane->dev,
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&dm_plane_state->ctm,
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val,
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sizeof(struct drm_color_ctm), -1,
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&replaced);
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dm_plane_state->base.color_mgmt_changed |= replaced;
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return ret;
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} else if (property == adev->mode_info.plane_shaper_lut_property) {
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ret = drm_property_replace_blob_from_id(plane->dev,
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&dm_plane_state->shaper_lut,
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@ -1608,6 +1626,9 @@ dm_atomic_plane_get_property(struct drm_plane *plane,
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*val = dm_plane_state->degamma_tf;
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} else if (property == adev->mode_info.plane_hdr_mult_property) {
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*val = dm_plane_state->hdr_mult;
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} else if (property == adev->mode_info.plane_ctm_property) {
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*val = (dm_plane_state->ctm) ?
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dm_plane_state->ctm->base.id : 0;
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} else if (property == adev->mode_info.plane_shaper_lut_property) {
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*val = (dm_plane_state->shaper_lut) ?
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dm_plane_state->shaper_lut->base.id : 0;
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