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iommu/tegra-smmu: Split smmu_flush_ptc()
smmu_flush_ptc() is used in two modes: one is to flush an individual entry, the other is to flush all entries. We know at the call site which we require. Split the function into smmu_flush_ptc_all() and smmu_flush_ptc(). Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: Thierry Reding <treding@nvidia.com>
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4b3c7d1076
commit
b8fe03827b
1 changed files with 13 additions and 13 deletions
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@ -165,29 +165,29 @@ static void smmu_flush_dcache(struct page *page, unsigned long offset,
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#endif
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}
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static void smmu_flush_ptc_all(struct tegra_smmu *smmu)
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{
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smmu_writel(smmu, SMMU_PTC_FLUSH_TYPE_ALL, SMMU_PTC_FLUSH);
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}
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static inline void smmu_flush_ptc(struct tegra_smmu *smmu, struct page *page,
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unsigned long offset)
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{
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phys_addr_t phys = page ? page_to_phys(page) : 0;
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phys_addr_t phys = page_to_phys(page);
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u32 value;
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if (page) {
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offset &= ~(smmu->mc->soc->atom_size - 1);
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offset &= ~(smmu->mc->soc->atom_size - 1);
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if (smmu->mc->soc->num_address_bits > 32) {
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if (smmu->mc->soc->num_address_bits > 32) {
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#ifdef CONFIG_PHYS_ADDR_T_64BIT
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value = (phys >> 32) & SMMU_PTC_FLUSH_HI_MASK;
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value = (phys >> 32) & SMMU_PTC_FLUSH_HI_MASK;
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#else
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value = 0;
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value = 0;
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#endif
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smmu_writel(smmu, value, SMMU_PTC_FLUSH_HI);
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}
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value = (phys + offset) | SMMU_PTC_FLUSH_TYPE_ADR;
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} else {
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value = SMMU_PTC_FLUSH_TYPE_ALL;
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smmu_writel(smmu, value, SMMU_PTC_FLUSH_HI);
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}
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value = (phys + offset) | SMMU_PTC_FLUSH_TYPE_ADR;
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smmu_writel(smmu, value, SMMU_PTC_FLUSH);
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}
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@ -894,7 +894,7 @@ struct tegra_smmu *tegra_smmu_probe(struct device *dev,
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smmu_writel(smmu, value, SMMU_TLB_CONFIG);
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smmu_flush_ptc(smmu, NULL, 0);
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smmu_flush_ptc_all(smmu);
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smmu_flush_tlb(smmu);
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smmu_writel(smmu, SMMU_CONFIG_ENABLE, SMMU_CONFIG);
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smmu_flush(smmu);
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