Merge branch 'i2c/for-current' of git://git.kernel.org/pub/scm/linux/kernel/git/wsa/linux
Pull i2c fixes from Wolfram Sang: "This is a bit larger than usual at rc4 time. The reason is due to Lee's work of fixing newly reported build warnings. The rest is fixes as usual" * 'i2c/for-current' of git://git.kernel.org/pub/scm/linux/kernel/git/wsa/linux: (22 commits) MAINTAINERS: adjust to removing i2c designware platform data i2c: s3c2410: fix possible NULL pointer deref on read message after write i2c: mediatek: Disable i2c start_en and clear intr_stat brfore reset i2c: i801: Don't generate an interrupt on bus reset i2c: mpc: implement erratum A-004447 workaround powerpc/fsl: set fsl,i2c-erratum-a004447 flag for P1010 i2c controllers powerpc/fsl: set fsl,i2c-erratum-a004447 flag for P2041 i2c controllers dt-bindings: i2c: mpc: Add fsl,i2c-erratum-a004447 flag i2c: busses: i2c-stm32f4: Remove incorrectly placed ' ' from function name i2c: busses: i2c-st: Fix copy/paste function misnaming issues i2c: busses: i2c-pnx: Provide descriptions for 'alg_data' data structure i2c: busses: i2c-ocores: Place the expected function names into the documentation headers i2c: busses: i2c-eg20t: Fix 'bad line' issue and provide description for 'msgs' param i2c: busses: i2c-designware-master: Fix misnaming of 'i2c_dw_init_master()' i2c: busses: i2c-cadence: Fix incorrectly documented 'enum cdns_i2c_slave_mode' i2c: busses: i2c-ali1563: File headers are not good candidates for kernel-doc i2c: muxes: i2c-arb-gpio-challenge: Demote non-conformant kernel-doc headers i2c: busses: i2c-nomadik: Fix formatting issue pertaining to 'timeout' i2c: sh_mobile: Use new clock calculation formulas for RZ/G2E i2c: I2C_HISI should depend on ACPI ...
This commit is contained in:
Linus Torvalds
commit
b90e90f40b
|
|
@ -46,6 +46,13 @@ properties:
|
|||
description: |
|
||||
I2C bus timeout in microseconds
|
||||
|
||||
fsl,i2c-erratum-a004447:
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||||
$ref: /schemas/types.yaml#/definitions/flag
|
||||
description: |
|
||||
Indicates the presence of QorIQ erratum A-004447, which
|
||||
says that the standard i2c recovery scheme mechanism does
|
||||
not work and an alternate implementation is needed.
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||||
|
||||
required:
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||||
- compatible
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- reg
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||||
|
|
|
|||
|
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@ -17678,7 +17678,6 @@ R: Mika Westerberg <mika.westerberg@linux.intel.com>
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L: linux-i2c@vger.kernel.org
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S: Maintained
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F: drivers/i2c/busses/i2c-designware-*
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F: include/linux/platform_data/i2c-designware.h
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||||
SYNOPSYS DESIGNWARE MMC/SD/SDIO DRIVER
|
||||
M: Jaehoon Chung <jh80.chung@samsung.com>
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|
|
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@ -122,7 +122,15 @@
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};
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/include/ "pq3-i2c-0.dtsi"
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i2c@3000 {
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fsl,i2c-erratum-a004447;
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};
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/include/ "pq3-i2c-1.dtsi"
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i2c@3100 {
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fsl,i2c-erratum-a004447;
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};
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/include/ "pq3-duart-0.dtsi"
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/include/ "pq3-espi-0.dtsi"
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spi0: spi@7000 {
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||||
|
|
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|||
|
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@ -371,7 +371,23 @@
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};
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/include/ "qoriq-i2c-0.dtsi"
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i2c@118000 {
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fsl,i2c-erratum-a004447;
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||||
};
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|
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i2c@118100 {
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fsl,i2c-erratum-a004447;
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};
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/include/ "qoriq-i2c-1.dtsi"
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i2c@119000 {
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fsl,i2c-erratum-a004447;
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};
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i2c@119100 {
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fsl,i2c-erratum-a004447;
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};
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/include/ "qoriq-duart-0.dtsi"
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/include/ "qoriq-duart-1.dtsi"
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/include/ "qoriq-gpio-0.dtsi"
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|
|
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|
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@ -647,7 +647,7 @@ config I2C_HIGHLANDER
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config I2C_HISI
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tristate "HiSilicon I2C controller"
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depends on ARM64 || COMPILE_TEST
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depends on (ARM64 && ACPI) || COMPILE_TEST
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help
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Say Y here if you want to have Hisilicon I2C controller support
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available on the Kunpeng Server.
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|
|
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|||
|
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@ -1,5 +1,5 @@
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// SPDX-License-Identifier: GPL-2.0-only
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/**
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/*
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* i2c-ali1563.c - i2c driver for the ALi 1563 Southbridge
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*
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* Copyright (C) 2004 Patrick Mochel
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|
|
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|
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@ -144,7 +144,7 @@ enum cdns_i2c_mode {
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};
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|
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/**
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* enum cdns_i2c_slave_mode - Slave state when I2C is operating in slave mode
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* enum cdns_i2c_slave_state - Slave state when I2C is operating in slave mode
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*
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* @CDNS_I2C_SLAVE_STATE_IDLE: I2C slave idle
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* @CDNS_I2C_SLAVE_STATE_SEND: I2C slave sending data to master
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|
|
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|||
|
|
@ -165,7 +165,7 @@ static int i2c_dw_set_timings_master(struct dw_i2c_dev *dev)
|
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}
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||||
|
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/**
|
||||
* i2c_dw_init() - Initialize the designware I2C master hardware
|
||||
* i2c_dw_init_master() - Initialize the designware I2C master hardware
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||||
* @dev: device private data
|
||||
*
|
||||
* This functions configures and enables the I2C master.
|
||||
|
|
|
|||
|
|
@ -148,7 +148,7 @@ struct i2c_algo_pch_data {
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|||
|
||||
/**
|
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* struct adapter_info - This structure holds the adapter information for the
|
||||
PCH i2c controller
|
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* PCH i2c controller
|
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* @pch_data: stores a list of i2c_algo_pch_data
|
||||
* @pch_i2c_suspended: specifies whether the system is suspended or not
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||||
* perhaps with more lines and words.
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|
|
@ -358,6 +358,7 @@ static void pch_i2c_repstart(struct i2c_algo_pch_data *adap)
|
|||
/**
|
||||
* pch_i2c_writebytes() - write data to I2C bus in normal mode
|
||||
* @i2c_adap: Pointer to the struct i2c_adapter.
|
||||
* @msgs: Pointer to the i2c message structure.
|
||||
* @last: specifies whether last message or not.
|
||||
* In the case of compound mode it will be 1 for last message,
|
||||
* otherwise 0.
|
||||
|
|
|
|||
|
|
@ -395,11 +395,9 @@ static int i801_check_post(struct i801_priv *priv, int status)
|
|||
dev_err(&priv->pci_dev->dev, "Transaction timeout\n");
|
||||
/* try to stop the current command */
|
||||
dev_dbg(&priv->pci_dev->dev, "Terminating the current operation\n");
|
||||
outb_p(inb_p(SMBHSTCNT(priv)) | SMBHSTCNT_KILL,
|
||||
SMBHSTCNT(priv));
|
||||
outb_p(SMBHSTCNT_KILL, SMBHSTCNT(priv));
|
||||
usleep_range(1000, 2000);
|
||||
outb_p(inb_p(SMBHSTCNT(priv)) & (~SMBHSTCNT_KILL),
|
||||
SMBHSTCNT(priv));
|
||||
outb_p(0, SMBHSTCNT(priv));
|
||||
|
||||
/* Check if it worked */
|
||||
status = inb_p(SMBHSTSTS(priv));
|
||||
|
|
|
|||
|
|
@ -123,7 +123,6 @@ static int icy_probe(struct zorro_dev *z,
|
|||
{
|
||||
struct icy_i2c *i2c;
|
||||
struct i2c_algo_pcf_data *algo_data;
|
||||
struct fwnode_handle *new_fwnode;
|
||||
struct i2c_board_info ltc2990_info = {
|
||||
.type = "ltc2990",
|
||||
.swnode = &icy_ltc2990_node,
|
||||
|
|
|
|||
|
|
@ -19,6 +19,7 @@
|
|||
|
||||
#include <linux/clk.h>
|
||||
#include <linux/io.h>
|
||||
#include <linux/iopoll.h>
|
||||
#include <linux/fsl_devices.h>
|
||||
#include <linux/i2c.h>
|
||||
#include <linux/interrupt.h>
|
||||
|
|
@ -45,6 +46,7 @@
|
|||
#define CCR_MTX 0x10
|
||||
#define CCR_TXAK 0x08
|
||||
#define CCR_RSTA 0x04
|
||||
#define CCR_RSVD 0x02
|
||||
|
||||
#define CSR_MCF 0x80
|
||||
#define CSR_MAAS 0x40
|
||||
|
|
@ -97,7 +99,7 @@ struct mpc_i2c {
|
|||
u32 block;
|
||||
int rc;
|
||||
int expect_rxack;
|
||||
|
||||
bool has_errata_A004447;
|
||||
};
|
||||
|
||||
struct mpc_i2c_divider {
|
||||
|
|
@ -136,6 +138,75 @@ static void mpc_i2c_fixup(struct mpc_i2c *i2c)
|
|||
}
|
||||
}
|
||||
|
||||
static int i2c_mpc_wait_sr(struct mpc_i2c *i2c, int mask)
|
||||
{
|
||||
void __iomem *addr = i2c->base + MPC_I2C_SR;
|
||||
u8 val;
|
||||
|
||||
return readb_poll_timeout(addr, val, val & mask, 0, 100);
|
||||
}
|
||||
|
||||
/*
|
||||
* Workaround for Erratum A004447. From the P2040CE Rev Q
|
||||
*
|
||||
* 1. Set up the frequency divider and sampling rate.
|
||||
* 2. I2CCR - a0h
|
||||
* 3. Poll for I2CSR[MBB] to get set.
|
||||
* 4. If I2CSR[MAL] is set (an indication that SDA is stuck low), then go to
|
||||
* step 5. If MAL is not set, then go to step 13.
|
||||
* 5. I2CCR - 00h
|
||||
* 6. I2CCR - 22h
|
||||
* 7. I2CCR - a2h
|
||||
* 8. Poll for I2CSR[MBB] to get set.
|
||||
* 9. Issue read to I2CDR.
|
||||
* 10. Poll for I2CSR[MIF] to be set.
|
||||
* 11. I2CCR - 82h
|
||||
* 12. Workaround complete. Skip the next steps.
|
||||
* 13. Issue read to I2CDR.
|
||||
* 14. Poll for I2CSR[MIF] to be set.
|
||||
* 15. I2CCR - 80h
|
||||
*/
|
||||
static void mpc_i2c_fixup_A004447(struct mpc_i2c *i2c)
|
||||
{
|
||||
int ret;
|
||||
u32 val;
|
||||
|
||||
writeccr(i2c, CCR_MEN | CCR_MSTA);
|
||||
ret = i2c_mpc_wait_sr(i2c, CSR_MBB);
|
||||
if (ret) {
|
||||
dev_err(i2c->dev, "timeout waiting for CSR_MBB\n");
|
||||
return;
|
||||
}
|
||||
|
||||
val = readb(i2c->base + MPC_I2C_SR);
|
||||
|
||||
if (val & CSR_MAL) {
|
||||
writeccr(i2c, 0x00);
|
||||
writeccr(i2c, CCR_MSTA | CCR_RSVD);
|
||||
writeccr(i2c, CCR_MEN | CCR_MSTA | CCR_RSVD);
|
||||
ret = i2c_mpc_wait_sr(i2c, CSR_MBB);
|
||||
if (ret) {
|
||||
dev_err(i2c->dev, "timeout waiting for CSR_MBB\n");
|
||||
return;
|
||||
}
|
||||
val = readb(i2c->base + MPC_I2C_DR);
|
||||
ret = i2c_mpc_wait_sr(i2c, CSR_MIF);
|
||||
if (ret) {
|
||||
dev_err(i2c->dev, "timeout waiting for CSR_MIF\n");
|
||||
return;
|
||||
}
|
||||
writeccr(i2c, CCR_MEN | CCR_RSVD);
|
||||
} else {
|
||||
val = readb(i2c->base + MPC_I2C_DR);
|
||||
ret = i2c_mpc_wait_sr(i2c, CSR_MIF);
|
||||
if (ret) {
|
||||
dev_err(i2c->dev, "timeout waiting for CSR_MIF\n");
|
||||
return;
|
||||
}
|
||||
writeccr(i2c, CCR_MEN);
|
||||
}
|
||||
}
|
||||
|
||||
#if defined(CONFIG_PPC_MPC52xx) || defined(CONFIG_PPC_MPC512x)
|
||||
static const struct mpc_i2c_divider mpc_i2c_dividers_52xx[] = {
|
||||
{20, 0x20}, {22, 0x21}, {24, 0x22}, {26, 0x23},
|
||||
|
|
@ -670,7 +741,10 @@ static int fsl_i2c_bus_recovery(struct i2c_adapter *adap)
|
|||
{
|
||||
struct mpc_i2c *i2c = i2c_get_adapdata(adap);
|
||||
|
||||
mpc_i2c_fixup(i2c);
|
||||
if (i2c->has_errata_A004447)
|
||||
mpc_i2c_fixup_A004447(i2c);
|
||||
else
|
||||
mpc_i2c_fixup(i2c);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
|
@ -767,6 +841,9 @@ static int fsl_i2c_probe(struct platform_device *op)
|
|||
}
|
||||
dev_info(i2c->dev, "timeout %u us\n", mpc_ops.timeout * 1000000 / HZ);
|
||||
|
||||
if (of_property_read_bool(op->dev.of_node, "fsl,i2c-erratum-a004447"))
|
||||
i2c->has_errata_A004447 = true;
|
||||
|
||||
i2c->adap = mpc_ops;
|
||||
scnprintf(i2c->adap.name, sizeof(i2c->adap.name),
|
||||
"MPC adapter (%s)", of_node_full_name(op->dev.of_node));
|
||||
|
|
|
|||
|
|
@ -479,6 +479,11 @@ static void mtk_i2c_clock_disable(struct mtk_i2c *i2c)
|
|||
static void mtk_i2c_init_hw(struct mtk_i2c *i2c)
|
||||
{
|
||||
u16 control_reg;
|
||||
u16 intr_stat_reg;
|
||||
|
||||
mtk_i2c_writew(i2c, I2C_CHN_CLR_FLAG, OFFSET_START);
|
||||
intr_stat_reg = mtk_i2c_readw(i2c, OFFSET_INTR_STAT);
|
||||
mtk_i2c_writew(i2c, intr_stat_reg, OFFSET_INTR_STAT);
|
||||
|
||||
if (i2c->dev_comp->apdma_sync) {
|
||||
writel(I2C_DMA_WARM_RST, i2c->pdmabase + OFFSET_RST);
|
||||
|
|
|
|||
|
|
@ -159,7 +159,7 @@ struct i2c_nmk_client {
|
|||
* @clk_freq: clock frequency for the operation mode
|
||||
* @tft: Tx FIFO Threshold in bytes
|
||||
* @rft: Rx FIFO Threshold in bytes
|
||||
* @timeout Slave response timeout (ms)
|
||||
* @timeout: Slave response timeout (ms)
|
||||
* @sm: speed mode
|
||||
* @stop: stop condition.
|
||||
* @xfer_complete: acknowledge completion for a I2C message.
|
||||
|
|
|
|||
|
|
@ -250,7 +250,7 @@ static irqreturn_t ocores_isr(int irq, void *dev_id)
|
|||
}
|
||||
|
||||
/**
|
||||
* Process timeout event
|
||||
* ocores_process_timeout() - Process timeout event
|
||||
* @i2c: ocores I2C device instance
|
||||
*/
|
||||
static void ocores_process_timeout(struct ocores_i2c *i2c)
|
||||
|
|
@ -264,7 +264,7 @@ static void ocores_process_timeout(struct ocores_i2c *i2c)
|
|||
}
|
||||
|
||||
/**
|
||||
* Wait until something change in a given register
|
||||
* ocores_wait() - Wait until something change in a given register
|
||||
* @i2c: ocores I2C device instance
|
||||
* @reg: register to query
|
||||
* @mask: bitmask to apply on register value
|
||||
|
|
@ -296,7 +296,7 @@ static int ocores_wait(struct ocores_i2c *i2c,
|
|||
}
|
||||
|
||||
/**
|
||||
* Wait until is possible to process some data
|
||||
* ocores_poll_wait() - Wait until is possible to process some data
|
||||
* @i2c: ocores I2C device instance
|
||||
*
|
||||
* Used when the device is in polling mode (interrupts disabled).
|
||||
|
|
@ -334,7 +334,7 @@ static int ocores_poll_wait(struct ocores_i2c *i2c)
|
|||
}
|
||||
|
||||
/**
|
||||
* It handles an IRQ-less transfer
|
||||
* ocores_process_polling() - It handles an IRQ-less transfer
|
||||
* @i2c: ocores I2C device instance
|
||||
*
|
||||
* Even if IRQ are disabled, the I2C OpenCore IP behavior is exactly the same
|
||||
|
|
|
|||
|
|
@ -138,7 +138,7 @@ static inline void i2c_pnx_arm_timer(struct i2c_pnx_algo_data *alg_data)
|
|||
/**
|
||||
* i2c_pnx_start - start a device
|
||||
* @slave_addr: slave address
|
||||
* @adap: pointer to adapter structure
|
||||
* @alg_data: pointer to local driver data structure
|
||||
*
|
||||
* Generate a START signal in the desired mode.
|
||||
*/
|
||||
|
|
@ -194,7 +194,7 @@ static int i2c_pnx_start(unsigned char slave_addr,
|
|||
|
||||
/**
|
||||
* i2c_pnx_stop - stop a device
|
||||
* @adap: pointer to I2C adapter structure
|
||||
* @alg_data: pointer to local driver data structure
|
||||
*
|
||||
* Generate a STOP signal to terminate the master transaction.
|
||||
*/
|
||||
|
|
@ -223,7 +223,7 @@ static void i2c_pnx_stop(struct i2c_pnx_algo_data *alg_data)
|
|||
|
||||
/**
|
||||
* i2c_pnx_master_xmit - transmit data to slave
|
||||
* @adap: pointer to I2C adapter structure
|
||||
* @alg_data: pointer to local driver data structure
|
||||
*
|
||||
* Sends one byte of data to the slave
|
||||
*/
|
||||
|
|
@ -293,7 +293,7 @@ static int i2c_pnx_master_xmit(struct i2c_pnx_algo_data *alg_data)
|
|||
|
||||
/**
|
||||
* i2c_pnx_master_rcv - receive data from slave
|
||||
* @adap: pointer to I2C adapter structure
|
||||
* @alg_data: pointer to local driver data structure
|
||||
*
|
||||
* Reads one byte data from the slave
|
||||
*/
|
||||
|
|
|
|||
|
|
@ -100,7 +100,7 @@ static const struct geni_i2c_err_log gi2c_log[] = {
|
|||
[GP_IRQ0] = {-EIO, "Unknown I2C err GP_IRQ0"},
|
||||
[NACK] = {-ENXIO, "NACK: slv unresponsive, check its power/reset-ln"},
|
||||
[GP_IRQ2] = {-EIO, "Unknown I2C err GP IRQ2"},
|
||||
[BUS_PROTO] = {-EPROTO, "Bus proto err, noisy/unepxected start/stop"},
|
||||
[BUS_PROTO] = {-EPROTO, "Bus proto err, noisy/unexpected start/stop"},
|
||||
[ARB_LOST] = {-EAGAIN, "Bus arbitration lost, clock line undriveable"},
|
||||
[GP_IRQ5] = {-EIO, "Unknown I2C err GP IRQ5"},
|
||||
[GENI_OVERRUN] = {-EIO, "Cmd overrun, check GENI cmd-state machine"},
|
||||
|
|
|
|||
|
|
@ -480,7 +480,10 @@ static int i2c_s3c_irq_nextbyte(struct s3c24xx_i2c *i2c, unsigned long iicstat)
|
|||
* forces us to send a new START
|
||||
* when we change direction
|
||||
*/
|
||||
dev_dbg(i2c->dev,
|
||||
"missing START before write->read\n");
|
||||
s3c24xx_i2c_stop(i2c, -EINVAL);
|
||||
break;
|
||||
}
|
||||
|
||||
goto retry_write;
|
||||
|
|
|
|||
|
|
@ -807,7 +807,7 @@ static const struct sh_mobile_dt_config r8a7740_dt_config = {
|
|||
static const struct of_device_id sh_mobile_i2c_dt_ids[] = {
|
||||
{ .compatible = "renesas,iic-r8a73a4", .data = &fast_clock_dt_config },
|
||||
{ .compatible = "renesas,iic-r8a7740", .data = &r8a7740_dt_config },
|
||||
{ .compatible = "renesas,iic-r8a774c0", .data = &fast_clock_dt_config },
|
||||
{ .compatible = "renesas,iic-r8a774c0", .data = &v2_freq_calc_dt_config },
|
||||
{ .compatible = "renesas,iic-r8a7790", .data = &v2_freq_calc_dt_config },
|
||||
{ .compatible = "renesas,iic-r8a7791", .data = &v2_freq_calc_dt_config },
|
||||
{ .compatible = "renesas,iic-r8a7792", .data = &v2_freq_calc_dt_config },
|
||||
|
|
|
|||
|
|
@ -524,7 +524,7 @@ static void st_i2c_handle_write(struct st_i2c_dev *i2c_dev)
|
|||
}
|
||||
|
||||
/**
|
||||
* st_i2c_handle_write() - Handle FIFO enmpty interrupt in case of read
|
||||
* st_i2c_handle_read() - Handle FIFO empty interrupt in case of read
|
||||
* @i2c_dev: Controller's private data
|
||||
*/
|
||||
static void st_i2c_handle_read(struct st_i2c_dev *i2c_dev)
|
||||
|
|
@ -558,7 +558,7 @@ static void st_i2c_handle_read(struct st_i2c_dev *i2c_dev)
|
|||
}
|
||||
|
||||
/**
|
||||
* st_i2c_isr() - Interrupt routine
|
||||
* st_i2c_isr_thread() - Interrupt routine
|
||||
* @irq: interrupt number
|
||||
* @data: Controller's private data
|
||||
*/
|
||||
|
|
|
|||
|
|
@ -313,7 +313,7 @@ static int stm32f4_i2c_wait_free_bus(struct stm32f4_i2c_dev *i2c_dev)
|
|||
}
|
||||
|
||||
/**
|
||||
* stm32f4_i2c_write_ byte() - Write a byte in the data register
|
||||
* stm32f4_i2c_write_byte() - Write a byte in the data register
|
||||
* @i2c_dev: Controller's private data
|
||||
* @byte: Data to write in the register
|
||||
*/
|
||||
|
|
|
|||
|
|
@ -34,7 +34,7 @@ struct i2c_arbitrator_data {
|
|||
};
|
||||
|
||||
|
||||
/**
|
||||
/*
|
||||
* i2c_arbitrator_select - claim the I2C bus
|
||||
*
|
||||
* Use the GPIO-based signalling protocol; return -EBUSY if we fail.
|
||||
|
|
@ -77,7 +77,7 @@ static int i2c_arbitrator_select(struct i2c_mux_core *muxc, u32 chan)
|
|||
return -EBUSY;
|
||||
}
|
||||
|
||||
/**
|
||||
/*
|
||||
* i2c_arbitrator_deselect - release the I2C bus
|
||||
*
|
||||
* Release the I2C bus using the GPIO-based signalling protocol.
|
||||
|
|
|
|||
Loading…
Reference in New Issue