mirror of
https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git
synced 2024-09-04 01:49:36 +00:00
gpio: ich: Add blink capability option
This patch allows gpio_ich driver to be aware of non blink capable chipsets. Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Vincent Donnefort <vdonnefort@gmail.com> Signed-off-by: Lee Jones <lee.jones@linaro.org>
This commit is contained in:
parent
facd993940
commit
ba7f74fe2b
1 changed files with 9 additions and 1 deletions
|
@ -62,6 +62,9 @@ struct ichx_desc {
|
||||||
/* Max GPIO pins the chipset can have */
|
/* Max GPIO pins the chipset can have */
|
||||||
uint ngpio;
|
uint ngpio;
|
||||||
|
|
||||||
|
/* GPO_BLINK is available on this chipset */
|
||||||
|
bool have_blink;
|
||||||
|
|
||||||
/* Whether the chipset has GPIO in GPE0_STS in the PM IO region */
|
/* Whether the chipset has GPIO in GPE0_STS in the PM IO region */
|
||||||
bool uses_gpe0;
|
bool uses_gpe0;
|
||||||
|
|
||||||
|
@ -151,7 +154,7 @@ static int ichx_gpio_direction_output(struct gpio_chip *gpio, unsigned nr,
|
||||||
int val)
|
int val)
|
||||||
{
|
{
|
||||||
/* Disable blink hardware which is available for GPIOs from 0 to 31. */
|
/* Disable blink hardware which is available for GPIOs from 0 to 31. */
|
||||||
if (nr < 32)
|
if (nr < 32 && ichx_priv.desc->have_blink)
|
||||||
ichx_write_bit(GPO_BLINK, nr, 0, 0);
|
ichx_write_bit(GPO_BLINK, nr, 0, 0);
|
||||||
|
|
||||||
/* Set GPIO output value. */
|
/* Set GPIO output value. */
|
||||||
|
@ -266,6 +269,7 @@ static struct ichx_desc ich6_desc = {
|
||||||
.uses_gpe0 = true,
|
.uses_gpe0 = true,
|
||||||
|
|
||||||
.ngpio = 50,
|
.ngpio = 50,
|
||||||
|
.have_blink = true,
|
||||||
};
|
};
|
||||||
|
|
||||||
/* Intel 3100 */
|
/* Intel 3100 */
|
||||||
|
@ -290,19 +294,23 @@ static struct ichx_desc i3100_desc = {
|
||||||
/* ICH7 and ICH8-based */
|
/* ICH7 and ICH8-based */
|
||||||
static struct ichx_desc ich7_desc = {
|
static struct ichx_desc ich7_desc = {
|
||||||
.ngpio = 50,
|
.ngpio = 50,
|
||||||
|
.have_blink = true,
|
||||||
};
|
};
|
||||||
|
|
||||||
/* ICH9-based */
|
/* ICH9-based */
|
||||||
static struct ichx_desc ich9_desc = {
|
static struct ichx_desc ich9_desc = {
|
||||||
.ngpio = 61,
|
.ngpio = 61,
|
||||||
|
.have_blink = true,
|
||||||
};
|
};
|
||||||
|
|
||||||
/* ICH10-based - Consumer/corporate versions have different amount of GPIO */
|
/* ICH10-based - Consumer/corporate versions have different amount of GPIO */
|
||||||
static struct ichx_desc ich10_cons_desc = {
|
static struct ichx_desc ich10_cons_desc = {
|
||||||
.ngpio = 61,
|
.ngpio = 61,
|
||||||
|
.have_blink = true,
|
||||||
};
|
};
|
||||||
static struct ichx_desc ich10_corp_desc = {
|
static struct ichx_desc ich10_corp_desc = {
|
||||||
.ngpio = 72,
|
.ngpio = 72,
|
||||||
|
.have_blink = true,
|
||||||
};
|
};
|
||||||
|
|
||||||
/* Intel 5 series, 6 series, 3400 series, and C200 series */
|
/* Intel 5 series, 6 series, 3400 series, and C200 series */
|
||||||
|
|
Loading…
Reference in a new issue