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ARM: dts: imx: align SPI NOR node name with dtschema 

The node names should be generic and SPI NOR dtschema expects "flash".

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
This commit is contained in:
Krzysztof Kozlowski 2022-04-07 16:31:54 +02:00 committed by Shawn Guo
parent 3d397a1277
commit ba9fe460dc
32 changed files with 34 additions and 34 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
arch/arm/boot/dts/imx28-evk.dts
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@ -129,7 +129,7 @@
pinctrl-0 = <&spi2_pins_a>;
status = "okay";
flash: m25p80@0 {
flash: flash@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "sst,sst25vf016b", "jedec,spi-nor";

2
arch/arm/boot/dts/imx28-m28evk.dts
View File

@ -33,7 +33,7 @@
pinctrl-0 = <&spi2_pins_a>;
status = "okay";
flash: m25p80@0 {
flash: flash@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "m25p80", "jedec,spi-nor";

2
arch/arm/boot/dts/imx28-sps1.dts
View File

@ -51,7 +51,7 @@
pinctrl-0 = <&spi2_pins_a>;
status = "okay";
flash: m25p80@0 {
flash: flash@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "everspin,mr25h256", "mr25h256";

2
arch/arm/boot/dts/imx6dl-rex-basic.dts
View File

@ -19,7 +19,7 @@
};
&ecspi3 {
flash: m25p80@0 {
flash: flash@0 {
compatible = "sst,sst25vf016b", "jedec,spi-nor";
spi-max-frequency = <20000000>;
reg = <0>;

2
arch/arm/boot/dts/imx6q-ba16.dtsi
View File

@ -142,7 +142,7 @@
pinctrl-0 = <&pinctrl_ecspi1>;
status = "okay";
flash: n25q032@0 {
flash: flash@0 {
compatible = "jedec,spi-nor";
#address-cells = <1>;
#size-cells = <1>;

2
arch/arm/boot/dts/imx6q-bx50v3.dtsi
View File

@ -160,7 +160,7 @@
pinctrl-0 = <&pinctrl_ecspi5>;
status = "okay";
m25_eeprom: m25p80@0 {
m25_eeprom: flash@0 {
compatible = "atmel,at25";
spi-max-frequency = <10000000>;
size = <0x8000>;

2
arch/arm/boot/dts/imx6q-cm-fx6.dts
View File

@ -260,7 +260,7 @@
pinctrl-0 = <&pinctrl_ecspi1>;
status = "okay";
m25p80@0 {
flash@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "st,m25p", "jedec,spi-nor";

2
arch/arm/boot/dts/imx6q-dmo-edmqmx6.dts
View File

@ -102,7 +102,7 @@
cs-gpios = <&gpio1 12 GPIO_ACTIVE_LOW>;
status = "okay";
flash: m25p80@0 {
flash: flash@0 {
compatible = "m25p80", "jedec,spi-nor";
spi-max-frequency = <40000000>;
reg = <0>;

2
arch/arm/boot/dts/imx6q-dms-ba16.dts
View File

@ -47,7 +47,7 @@
pinctrl-0 = <&pinctrl_ecspi5>;
status = "okay";
m25_eeprom: m25p80@0 {
m25_eeprom: flash@0 {
compatible = "atmel,at25256B", "atmel,at25";
spi-max-frequency = <20000000>;
size = <0x8000>;

2
arch/arm/boot/dts/imx6q-gw5400-a.dts
View File

@ -137,7 +137,7 @@
pinctrl-0 = <&pinctrl_ecspi1>;
status = "okay";
flash: m25p80@0 {
flash: flash@0 {
compatible = "sst,w25q256", "jedec,spi-nor";
spi-max-frequency = <30000000>;
reg = <0>;

2
arch/arm/boot/dts/imx6q-marsboard.dts
View File

@ -100,7 +100,7 @@
cs-gpios = <&gpio2 30 GPIO_ACTIVE_LOW>;
status = "okay";
m25p80@0 {
flash@0 {
compatible = "microchip,sst25vf016b";
spi-max-frequency = <20000000>;
reg = <0>;

2
arch/arm/boot/dts/imx6q-rex-pro.dts
View File

@ -19,7 +19,7 @@
};
&ecspi3 {
flash: m25p80@0 {
flash: flash@0 {
compatible = "sst,sst25vf032b", "jedec,spi-nor";
spi-max-frequency = <20000000>;
reg = <0>;

2
arch/arm/boot/dts/imx6qdl-aristainetos.dtsi
View File

@ -96,7 +96,7 @@
pinctrl-0 = <&pinctrl_ecspi4>;
status = "okay";
flash: m25p80@0 {
flash: flash@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "micron,n25q128a11", "jedec,spi-nor";

2
arch/arm/boot/dts/imx6qdl-aristainetos2.dtsi
View File

@ -131,7 +131,7 @@
pinctrl-0 = <&pinctrl_ecspi4>;
status = "okay";
flash: m25p80@1 {
flash: flash@1 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "micron,n25q128a11", "jedec,spi-nor";

2
arch/arm/boot/dts/imx6qdl-dfi-fs700-m60.dtsi
View File

@ -35,7 +35,7 @@
pinctrl-0 = <&pinctrl_ecspi3>;
status = "okay";
flash: m25p80@0 {
flash: flash@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "sst,sst25vf040b", "jedec,spi-nor";

2
arch/arm/boot/dts/imx6qdl-kontron-samx6i.dtsi
View File

@ -258,7 +258,7 @@
status = "okay";
/* default boot source: workaround #1 for errata ERR006282 */
smarc_flash: spi-flash@0 {
smarc_flash: flash@0 {
compatible = "winbond,w25q16dw", "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <20000000>;

2
arch/arm/boot/dts/imx6qdl-nit6xlite.dtsi
View File

@ -179,7 +179,7 @@
pinctrl-0 = <&pinctrl_ecspi1>;
status = "okay";
flash: m25p80@0 {
flash: flash@0 {
compatible = "microchip,sst25vf016b";
spi-max-frequency = <20000000>;
reg = <0>;

2
arch/arm/boot/dts/imx6qdl-nitrogen6_max.dtsi
View File

@ -321,7 +321,7 @@
pinctrl-0 = <&pinctrl_ecspi1>;
status = "okay";
flash: m25p80@0 {
flash: flash@0 {
compatible = "microchip,sst25vf016b";
spi-max-frequency = <20000000>;
reg = <0>;

2
arch/arm/boot/dts/imx6qdl-nitrogen6_som2.dtsi
View File

@ -252,7 +252,7 @@
pinctrl-0 = <&pinctrl_ecspi1>;
status = "okay";
flash: m25p80@0 {
flash: flash@0 {
compatible = "microchip,sst25vf016b";
spi-max-frequency = <20000000>;
reg = <0>;

2
arch/arm/boot/dts/imx6qdl-nitrogen6x.dtsi
View File

@ -237,7 +237,7 @@
pinctrl-0 = <&pinctrl_ecspi1>;
status = "okay";
flash: m25p80@0 {
flash: flash@0 {
compatible = "sst,sst25vf016b", "jedec,spi-nor";
spi-max-frequency = <20000000>;
reg = <0>;

2
arch/arm/boot/dts/imx6qdl-sabreauto.dtsi
View File

@ -272,7 +272,7 @@
pinctrl-0 = <&pinctrl_ecspi1 &pinctrl_ecspi1_cs>;
status = "disabled"; /* pin conflict with WEIM NOR */
flash: m25p80@0 {
flash: flash@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "st,m25p32", "jedec,spi-nor";

2
arch/arm/boot/dts/imx6qdl-sabrelite.dtsi
View File

@ -313,7 +313,7 @@
pinctrl-0 = <&pinctrl_ecspi1>;
status = "okay";
flash: m25p80@0 {
flash: flash@0 {
compatible = "sst,sst25vf016b", "jedec,spi-nor";
spi-max-frequency = <20000000>;
reg = <0>;

2
arch/arm/boot/dts/imx6qdl-sabresd.dtsi
View File

@ -197,7 +197,7 @@
pinctrl-0 = <&pinctrl_ecspi1>;
status = "okay";
flash: m25p80@0 {
flash: flash@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "st,m25p32", "jedec,spi-nor";

2
arch/arm/boot/dts/imx6sl-evk.dts
View File

@ -137,7 +137,7 @@
pinctrl-0 = <&pinctrl_ecspi1>;
status = "okay";
flash: m25p80@0 {
flash: flash@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "st,m25p32", "jedec,spi-nor";

2
arch/arm/boot/dts/imx6sx-nitrogen6sx.dts
View File

@ -107,7 +107,7 @@
pinctrl-0 = <&pinctrl_ecspi1>;
status = "okay";
flash: m25p80@0 {
flash: flash@0 {
compatible = "microchip,sst25vf016b";
spi-max-frequency = <20000000>;
reg = <0>;

4
arch/arm/boot/dts/imx6sx-sdb-reva.dts
View File

@ -123,7 +123,7 @@
pinctrl-0 = <&pinctrl_qspi2>;
status = "okay";
flash0: s25fl128s@0 {
flash0: flash@0 {
reg = <0>;
#address-cells = <1>;
#size-cells = <1>;
@ -133,7 +133,7 @@
spi-tx-bus-width = <4>;
};
flash1: s25fl128s@2 {
flash1: flash@2 {
reg = <2>;
#address-cells = <1>;
#size-cells = <1>;

4
arch/arm/boot/dts/imx6sx-sdb.dts
View File

@ -108,7 +108,7 @@
pinctrl-0 = <&pinctrl_qspi2>;
status = "okay";
flash0: n25q256a@0 {
flash0: flash@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "micron,n25q256a", "jedec,spi-nor";
@ -118,7 +118,7 @@
reg = <0>;
};
flash1: n25q256a@2 {
flash1: flash@2 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "micron,n25q256a", "jedec,spi-nor";

2
arch/arm/boot/dts/imx6ul-14x14-evk.dtsi
View File

@ -286,7 +286,7 @@
pinctrl-0 = <&pinctrl_qspi>;
status = "okay";
flash0: n25q256a@0 {
flash0: flash@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "micron,n25q256a", "jedec,spi-nor";

2
arch/arm/boot/dts/imx6ul-kontron-n6310-som.dtsi
View File

@ -19,7 +19,7 @@
};
&qspi {
spi-flash@0 {
flash@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "spi-nand";

2
arch/arm/boot/dts/imx6ul-kontron-n6311-som.dtsi
View File

@ -18,7 +18,7 @@
};
&qspi {
spi-flash@0 {
flash@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "spi-nand";

2
arch/arm/boot/dts/imx6ul-kontron-n6x1x-som-common.dtsi
View File

@ -19,7 +19,7 @@
pinctrl-0 = <&pinctrl_ecspi2>;
status = "okay";
spi-flash@0 {
flash@0 {
compatible = "mxicy,mx25v8035f", "jedec,spi-nor";
spi-max-frequency = <50000000>;
reg = <0>;

2
arch/arm/boot/dts/imx6ull-kontron-n6411-som.dtsi
View File

@ -18,7 +18,7 @@
};
&qspi {
spi-flash@0 {
flash@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "spi-nand";