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clk: keystone: syscon-clk: Add support for AM62 epwm-tbclk

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AM62 has 3 instances of EPWM modules. Each EPWM module has
an EPWM TBCLKEN module input used to individually enable or
disable its EPWM time-base clock. The EPWM time-base clock
enable input comes from the CTRLMMR_EPWM_TB_CLKEN register
bits 0 to 2 in CTRL_MMR0 module (6.1.1.4.1.48 [1]). This
is virtually the same setup as in AM64 but with 3 instead
of 9 clock providers on AM62.

Update the driver with the 3 instances of clocks associated
to a new compatible: "ti,am62-epwm-tbclk".

[1] https://www.ti.com/lit/pdf/spruiv7

Signed-off-by: Georgi Vlaev <g-vlaev@ti.com>
Tested-by: Vignesh Raghavendra <vigneshr@ti.com>
Link: https://lore.kernel.org/r/20220415190343.6284-3-g-vlaev@ti.com
Reviewed-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
This commit is contained in:
Georgi Vlaev 2022-04-15 22:03:43 +03:00 committed by Stephen Boyd
parent 4ce2b909dc
commit bae71de51b
1 changed files with 11 additions and 0 deletions
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11
drivers/clk/keystone/syscon-clk.c
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@ -162,6 +162,13 @@ static const struct ti_syscon_gate_clk_data am64_clk_data[] = {
{ /* Sentinel */ },
};
static const struct ti_syscon_gate_clk_data am62_clk_data[] = {
TI_SYSCON_CLK_GATE("epwm_tbclk0", 0x0, 0),
TI_SYSCON_CLK_GATE("epwm_tbclk1", 0x0, 1),
TI_SYSCON_CLK_GATE("epwm_tbclk2", 0x0, 2),
{ /* Sentinel */ },
};
static const struct of_device_id ti_syscon_gate_clk_ids[] = {
{
.compatible = "ti,am654-ehrpwm-tbclk",
@ -171,6 +178,10 @@ static const struct of_device_id ti_syscon_gate_clk_ids[] = {
.compatible = "ti,am64-epwm-tbclk",
.data = &am64_clk_data,
},
{
.compatible = "ti,am62-epwm-tbclk",
.data = &am62_clk_data,
},
{ }
};
MODULE_DEVICE_TABLE(of, ti_syscon_gate_clk_ids);