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[MIPS] MIPS64 R2 optimizations for 64-bit endianess swapping.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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@ -39,6 +39,24 @@ static __inline__ __attribute_const__ __u32 ___arch__swab32(__u32 x)
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}
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#define __arch__swab32(x) ___arch__swab32(x)
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#ifdef CONFIG_CPU_MIPS64_R2
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static __inline__ __attribute_const__ __u64 ___arch__swab64(__u64 x)
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{
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__asm__(
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" dsbh %0, %1 \n"
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" dshd %0, %0 \n"
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" drotr %0, %0, 32 \n"
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: "=r" (x)
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: "r" (x));
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return x;
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}
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#define __arch__swab64(x) ___arch__swab64(x)
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#endif /* CONFIG_CPU_MIPS64_R2 */
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#endif /* CONFIG_CPU_MIPSR2 */
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#if !defined(__STRICT_ANSI__) || defined(__KERNEL__)
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