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[MIPS] Define known MIPS ISA overrides for Sibyte and Excite boards.
Signed-Off-By: Thiemo Seufer <ths@networkno.de> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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2 changed files with 11 additions and 1 deletions
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@ -34,6 +34,11 @@
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#define cpu_has_nofpuex 0
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#define cpu_has_64bits 1
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#define cpu_has_mips32r1 0
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#define cpu_has_mips32r2 0
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#define cpu_has_mips64r1 0
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#define cpu_has_mips64r2 0
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#define cpu_has_inclusive_pcaches 0
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#define cpu_dcache_line_size() 32
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@ -9,7 +9,7 @@
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#define __ASM_MACH_SIBYTE_CPU_FEATURE_OVERRIDES_H
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/*
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* Sibyte are MIPS64 processors weired to a specific configuration
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* Sibyte are MIPS64 processors wired to a specific configuration
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*/
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#define cpu_has_watch 1
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#define cpu_has_mips16 0
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@ -33,6 +33,11 @@
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#define cpu_has_nofpuex 0
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#define cpu_has_64bits 1
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#define cpu_has_mips32r1 1
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#define cpu_has_mips32r2 0
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#define cpu_has_mips64r1 1
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#define cpu_has_mips64r2 0
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#define cpu_has_inclusive_pcaches 0
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#define cpu_dcache_line_size() 32
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