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PCI: aardvark: Fix reporting Slot capabilities on emulated bridge
Slot capabilities are currently not reported because emulated bridge does not report the PCI_EXP_FLAGS_SLOT flag. Set PCI_EXP_FLAGS_SLOT to let the kernel know that PCI_EXP_SLT* registers are supported. Move setting of PCI_EXP_SLTCTL register from "dynamic" pcie_conf_read function to static buffer as it is only statically filled the PCI_EXP_SLTSTA_PDS flag and dynamic read callback is not needed for this register. Set Presence State Bit to 1 since there is no support for unplugging the card and there is currently no platform able to detect presence of a card - in such a case the bit needs to be set to 1. Finally correctly set Physical Slot Number to 1 since there is only one port and zero value is reserved for ports within the same silicon as Root Port which is not our case for Aardvark HW. Link: https://lore.kernel.org/r/20220524132827.8837-3-kabel@kernel.org Signed-off-by: Pali Rohár <pali@kernel.org> Signed-off-by: Marek Behún <kabel@kernel.org> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
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1 changed files with 24 additions and 9 deletions
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@ -8,6 +8,7 @@
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* Author: Hezi Shahmoon <hezi.shahmoon@marvell.com>
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*/
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#include <linux/bitfield.h>
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#include <linux/delay.h>
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#include <linux/gpio/consumer.h>
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#include <linux/interrupt.h>
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@ -858,14 +859,11 @@ advk_pci_bridge_emul_pcie_conf_read(struct pci_bridge_emul *bridge,
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switch (reg) {
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case PCI_EXP_SLTCTL:
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*value = PCI_EXP_SLTSTA_PDS << 16;
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return PCI_BRIDGE_EMUL_HANDLED;
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/*
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* PCI_EXP_RTCTL and PCI_EXP_RTSTA are also supported, but do not need
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* to be handled here, because their values are stored in emulated
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* config space buffer, and we read them from there when needed.
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* PCI_EXP_SLTCAP, PCI_EXP_SLTCTL, PCI_EXP_RTCTL and PCI_EXP_RTSTA are
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* also supported, but do not need to be handled here, because their
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* values are stored in emulated config space buffer, and we read them
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* from there when needed.
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*/
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case PCI_EXP_LNKCAP: {
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@ -1056,8 +1054,25 @@ static int advk_sw_pci_bridge_init(struct advk_pcie *pcie)
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/* Support interrupt A for MSI feature */
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bridge->conf.intpin = PCI_INTERRUPT_INTA;
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/* Aardvark HW provides PCIe Capability structure in version 2 */
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bridge->pcie_conf.cap = cpu_to_le16(2);
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/*
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* Aardvark HW provides PCIe Capability structure in version 2 and
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* indicate slot support, which is emulated.
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*/
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bridge->pcie_conf.cap = cpu_to_le16(2 | PCI_EXP_FLAGS_SLOT);
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/*
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* Set Presence Detect State bit permanently since there is no support
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* for unplugging the card nor detecting whether it is plugged. (If a
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* platform exists in the future that supports it, via a GPIO for
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* example, it should be implemented via this bit.)
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*
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* Set physical slot number to 1 since there is only one port and zero
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* value is reserved for ports within the same silicon as Root Port
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* which is not our case.
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*/
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bridge->pcie_conf.slotcap = cpu_to_le32(FIELD_PREP(PCI_EXP_SLTCAP_PSN,
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1));
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bridge->pcie_conf.slotsta = cpu_to_le16(PCI_EXP_SLTSTA_PDS);
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/* Indicates supports for Completion Retry Status */
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bridge->pcie_conf.rootcap = cpu_to_le16(PCI_EXP_RTCAP_CRSVIS);
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