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sh: Support for SH-2A 32-bit opcodes. 

SH-2A supports both 16 and 32-bit instructions, add a simple helper
for figuring out the instruction size in the places where there are
hardcoded 16-bit assumptions.

Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This commit is contained in:
Paul Mundt 2007-05-08 14:50:59 +09:00 committed by Paul Mundt
parent 51c8b856f5
commit bd0799977c
6 changed files with 74 additions and 10 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

5
arch/sh/kernel/cpu/sh2a/Makefile
View File

@ -2,9 +2,8 @@
# Makefile for the Linux/SuperH SH-2A backends.
#
obj-y := common.o probe.o
obj-y := common.o probe.o opcode_helper.o
common-y += $(addprefix ../sh2/, ex.o)
common-y += $(addprefix ../sh2/, entry.o)
common-y += $(addprefix ../sh2/, ex.o entry.o)
obj-$(CONFIG_CPU_SUBTYPE_SH7206) += setup-sh7206.o clock-sh7206.o

55
arch/sh/kernel/cpu/sh2a/opcode_helper.c Normal file
View File

@ -0,0 +1,55 @@
/*
* arch/sh/kernel/cpu/sh2a/opcode_helper.c
*
* Helper for the SH-2A 32-bit opcodes.
*
* Copyright (C) 2007 Paul Mundt
*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*/
#include <linux/kernel.h>
#include <asm/system.h>
/*
* Instructions on SH are generally fixed at 16-bits, however, SH-2A
* introduces some 32-bit instructions. Since there are no real
* constraints on their use (and they can be mixed and matched), we need
* to check the instruction encoding to work out if it's a true 32-bit
* instruction or not.
*
* Presently, 32-bit opcodes have only slight variations in what the
* actual encoding looks like in the first-half of the instruction, which
* makes it fairly straightforward to differentiate from the 16-bit ones.
*
* First 16-bits of encoding Used by
*
* 0011nnnnmmmm0001 mov.b, mov.w, mov.l, fmov.d,
* fmov.s, movu.b, movu.w
*
* 0011nnnn0iii1001 bclr.b, bld.b, bset.b, bst.b, band.b,
* bandnot.b, bldnot.b, bor.b, bornot.b,
* bxor.b
*
* 0000nnnniiii0000 movi20
* 0000nnnniiii0001 movi20s
*/
unsigned int instruction_size(unsigned int insn)
{
/* Look for the common cases */
switch ((insn & 0xf00f)) {
case 0x0000: /* movi20 */
case 0x0001: /* movi20s */
case 0x3001: /* 32-bit mov/fmov/movu variants */
return 4;
}
/* And the special cases.. */
switch ((insn & 0xf08f)) {
case 0x3009: /* 32-bit b*.b bit operations */
return 4;
}
return 2;
}

2
arch/sh/kernel/kgdb_stub.c
View File

@ -867,7 +867,7 @@ static void kgdb_command_loop(const int excep_code, const int trapa_value)
trap 0xff, since that indicates a compiled-in breakpoint which
will not be replaced (and we would retake the trap forever) */
if ((excep_code == TRAP_VEC) && (trapa_value != (0x3c << 2)))
trap_registers.pc -= 2;
trap_registers.pc -= instruction_size(trap_registers.pc);
/* Undo any stepping we may have done */
undo_single_step();

5
arch/sh/kernel/process.c
View File

@ -19,6 +19,7 @@
#include <asm/uaccess.h>
#include <asm/mmu_context.h>
#include <asm/pgalloc.h>
#include <asm/system.h>
#include <asm/ubc.h>
static int hlt_counter;
@ -497,7 +498,7 @@ asmlinkage void debug_trap_handler(unsigned long r4, unsigned long r5,
struct pt_regs *regs = RELOC_HIDE(&__regs, 0);
/* Rewind */
regs->pc -= 2;
regs->pc -= instruction_size(regs->pc);
if (notify_die(DIE_TRAP, regs, regs->tra & 0xff,
SIGTRAP) == NOTIFY_STOP)
@ -516,7 +517,7 @@ asmlinkage void bug_trap_handler(unsigned long r4, unsigned long r5,
struct pt_regs *regs = RELOC_HIDE(&__regs, 0);
/* Rewind */
regs->pc -= 2;
regs->pc -= instruction_size(regs->pc);
if (notify_die(DIE_TRAP, regs, TRAPA_BUG_OPCODE & 0xff,
SIGTRAP) == NOTIFY_STOP)

8
arch/sh/kernel/signal.c
View File

@ -23,7 +23,7 @@
#include <linux/personality.h>
#include <linux/binfmts.h>
#include <linux/freezer.h>
#include <asm/system.h>
#include <asm/ucontext.h>
#include <asm/uaccess.h>
#include <asm/pgtable.h>
@ -500,7 +500,7 @@ handle_signal(unsigned long sig, struct k_sigaction *ka, siginfo_t *info,
}
/* fallthrough */
case -ERESTARTNOINTR:
regs->pc -= 2;
regs->pc -= instruction_size(regs->pc);
}
} else {
/* gUSA handling */
@ -600,9 +600,9 @@ static void do_signal(struct pt_regs *regs, unsigned int save_r0)
regs->regs[0] == -ERESTARTSYS ||
regs->regs[0] == -ERESTARTNOINTR) {
regs->regs[0] = save_r0;
regs->pc -= 2;
regs->pc -= instruction_size(regs->pc);
} else if (regs->regs[0] == -ERESTART_RESTARTBLOCK) {
regs->pc -= 2;
regs->pc -= instruction_size(regs->pc);
regs->regs[3] = __NR_restart_syscall;
}
}

9
include/asm-sh/system.h
View File

@ -255,6 +255,15 @@ static inline void *set_exception_table_evt(unsigned int evt, void *handler)
return set_exception_table_vec(evt >> 5, handler);
}
/*
* SH-2A has both 16 and 32-bit opcodes, do lame encoding checks.
*/
#ifdef CONFIG_CPU_SH2A
extern unsigned int instruction_size(unsigned int insn);
#else
#define instruction_size(insn) (2)
#endif
/* XXX
* disable hlt during certain critical i/o operations
*/