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sh: Support for SH-2A 32-bit opcodes.
SH-2A supports both 16 and 32-bit instructions, add a simple helper for figuring out the instruction size in the places where there are hardcoded 16-bit assumptions. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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6 changed files with 74 additions and 10 deletions
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@ -2,9 +2,8 @@
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# Makefile for the Linux/SuperH SH-2A backends.
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# Makefile for the Linux/SuperH SH-2A backends.
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#
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#
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obj-y := common.o probe.o
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obj-y := common.o probe.o opcode_helper.o
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common-y += $(addprefix ../sh2/, ex.o)
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common-y += $(addprefix ../sh2/, ex.o entry.o)
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common-y += $(addprefix ../sh2/, entry.o)
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obj-$(CONFIG_CPU_SUBTYPE_SH7206) += setup-sh7206.o clock-sh7206.o
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obj-$(CONFIG_CPU_SUBTYPE_SH7206) += setup-sh7206.o clock-sh7206.o
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55
arch/sh/kernel/cpu/sh2a/opcode_helper.c
Normal file
55
arch/sh/kernel/cpu/sh2a/opcode_helper.c
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@ -0,0 +1,55 @@
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/*
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* arch/sh/kernel/cpu/sh2a/opcode_helper.c
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*
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* Helper for the SH-2A 32-bit opcodes.
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*
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* Copyright (C) 2007 Paul Mundt
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*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*/
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#include <linux/kernel.h>
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#include <asm/system.h>
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/*
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* Instructions on SH are generally fixed at 16-bits, however, SH-2A
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* introduces some 32-bit instructions. Since there are no real
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* constraints on their use (and they can be mixed and matched), we need
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* to check the instruction encoding to work out if it's a true 32-bit
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* instruction or not.
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*
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* Presently, 32-bit opcodes have only slight variations in what the
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* actual encoding looks like in the first-half of the instruction, which
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* makes it fairly straightforward to differentiate from the 16-bit ones.
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*
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* First 16-bits of encoding Used by
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*
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* 0011nnnnmmmm0001 mov.b, mov.w, mov.l, fmov.d,
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* fmov.s, movu.b, movu.w
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*
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* 0011nnnn0iii1001 bclr.b, bld.b, bset.b, bst.b, band.b,
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* bandnot.b, bldnot.b, bor.b, bornot.b,
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* bxor.b
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*
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* 0000nnnniiii0000 movi20
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* 0000nnnniiii0001 movi20s
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*/
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unsigned int instruction_size(unsigned int insn)
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{
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/* Look for the common cases */
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switch ((insn & 0xf00f)) {
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case 0x0000: /* movi20 */
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case 0x0001: /* movi20s */
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case 0x3001: /* 32-bit mov/fmov/movu variants */
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return 4;
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}
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/* And the special cases.. */
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switch ((insn & 0xf08f)) {
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case 0x3009: /* 32-bit b*.b bit operations */
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return 4;
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}
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return 2;
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}
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@ -867,7 +867,7 @@ static void kgdb_command_loop(const int excep_code, const int trapa_value)
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trap 0xff, since that indicates a compiled-in breakpoint which
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trap 0xff, since that indicates a compiled-in breakpoint which
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will not be replaced (and we would retake the trap forever) */
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will not be replaced (and we would retake the trap forever) */
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if ((excep_code == TRAP_VEC) && (trapa_value != (0x3c << 2)))
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if ((excep_code == TRAP_VEC) && (trapa_value != (0x3c << 2)))
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trap_registers.pc -= 2;
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trap_registers.pc -= instruction_size(trap_registers.pc);
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/* Undo any stepping we may have done */
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/* Undo any stepping we may have done */
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undo_single_step();
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undo_single_step();
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@ -19,6 +19,7 @@
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#include <asm/uaccess.h>
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#include <asm/uaccess.h>
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#include <asm/mmu_context.h>
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#include <asm/mmu_context.h>
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#include <asm/pgalloc.h>
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#include <asm/pgalloc.h>
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#include <asm/system.h>
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#include <asm/ubc.h>
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#include <asm/ubc.h>
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static int hlt_counter;
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static int hlt_counter;
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@ -497,7 +498,7 @@ asmlinkage void debug_trap_handler(unsigned long r4, unsigned long r5,
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struct pt_regs *regs = RELOC_HIDE(&__regs, 0);
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struct pt_regs *regs = RELOC_HIDE(&__regs, 0);
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/* Rewind */
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/* Rewind */
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regs->pc -= 2;
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regs->pc -= instruction_size(regs->pc);
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if (notify_die(DIE_TRAP, regs, regs->tra & 0xff,
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if (notify_die(DIE_TRAP, regs, regs->tra & 0xff,
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SIGTRAP) == NOTIFY_STOP)
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SIGTRAP) == NOTIFY_STOP)
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@ -516,7 +517,7 @@ asmlinkage void bug_trap_handler(unsigned long r4, unsigned long r5,
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struct pt_regs *regs = RELOC_HIDE(&__regs, 0);
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struct pt_regs *regs = RELOC_HIDE(&__regs, 0);
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/* Rewind */
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/* Rewind */
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regs->pc -= 2;
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regs->pc -= instruction_size(regs->pc);
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if (notify_die(DIE_TRAP, regs, TRAPA_BUG_OPCODE & 0xff,
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if (notify_die(DIE_TRAP, regs, TRAPA_BUG_OPCODE & 0xff,
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SIGTRAP) == NOTIFY_STOP)
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SIGTRAP) == NOTIFY_STOP)
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@ -23,7 +23,7 @@
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#include <linux/personality.h>
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#include <linux/personality.h>
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#include <linux/binfmts.h>
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#include <linux/binfmts.h>
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#include <linux/freezer.h>
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#include <linux/freezer.h>
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#include <asm/system.h>
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#include <asm/ucontext.h>
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#include <asm/ucontext.h>
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#include <asm/uaccess.h>
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#include <asm/uaccess.h>
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#include <asm/pgtable.h>
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#include <asm/pgtable.h>
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@ -500,7 +500,7 @@ handle_signal(unsigned long sig, struct k_sigaction *ka, siginfo_t *info,
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}
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}
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/* fallthrough */
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/* fallthrough */
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case -ERESTARTNOINTR:
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case -ERESTARTNOINTR:
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regs->pc -= 2;
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regs->pc -= instruction_size(regs->pc);
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}
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}
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} else {
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} else {
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/* gUSA handling */
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/* gUSA handling */
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regs->regs[0] == -ERESTARTSYS ||
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regs->regs[0] == -ERESTARTSYS ||
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regs->regs[0] == -ERESTARTNOINTR) {
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regs->regs[0] == -ERESTARTNOINTR) {
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regs->regs[0] = save_r0;
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regs->regs[0] = save_r0;
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regs->pc -= 2;
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regs->pc -= instruction_size(regs->pc);
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} else if (regs->regs[0] == -ERESTART_RESTARTBLOCK) {
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} else if (regs->regs[0] == -ERESTART_RESTARTBLOCK) {
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regs->pc -= 2;
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regs->pc -= instruction_size(regs->pc);
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regs->regs[3] = __NR_restart_syscall;
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regs->regs[3] = __NR_restart_syscall;
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}
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}
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}
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}
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return set_exception_table_vec(evt >> 5, handler);
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return set_exception_table_vec(evt >> 5, handler);
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}
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}
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/*
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* SH-2A has both 16 and 32-bit opcodes, do lame encoding checks.
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*/
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#ifdef CONFIG_CPU_SH2A
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extern unsigned int instruction_size(unsigned int insn);
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#else
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#define instruction_size(insn) (2)
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#endif
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/* XXX
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/* XXX
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* disable hlt during certain critical i/o operations
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* disable hlt during certain critical i/o operations
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*/
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*/
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