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dt-bindings: phy: ti: phy-gmii-sel: Add bindings for J7200
TI's J7200 SoC supports additional PHY modes like QSGMII and SGMII that are not supported on earlier SoCs. Add a compatible for it. Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20220912085650.83263-3-s-vadapalli@ti.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
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2 changed files with 31 additions and 0 deletions
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@ -54,6 +54,12 @@ patternProperties:
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description:
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Clock provider for TI EHRPWM nodes.
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"phy@[0-9a-f]+$":
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type: object
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$ref: /schemas/phy/ti,phy-gmii-sel.yaml#
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description:
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The phy node corresponding to the ethernet MAC.
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required:
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- compatible
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- reg
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@ -53,12 +53,25 @@ properties:
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- ti,am43xx-phy-gmii-sel
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- ti,dm814-phy-gmii-sel
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- ti,am654-phy-gmii-sel
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- ti,j7200-cpsw5g-phy-gmii-sel
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reg:
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maxItems: 1
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'#phy-cells': true
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ti,qsgmii-main-ports:
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$ref: /schemas/types.yaml#/definitions/uint32-array
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description: |
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Required only for QSGMII mode. Array to select the port for
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QSGMII main mode. Rest of the ports are selected as QSGMII_SUB
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ports automatically. Any one of the 4 CPSW5G ports can act as the
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main port with the rest of them being the QSGMII_SUB ports.
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maxItems: 1
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items:
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minimum: 1
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maximum: 4
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allOf:
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- if:
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properties:
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@ -73,6 +86,18 @@ allOf:
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'#phy-cells':
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const: 1
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description: CPSW port number (starting from 1)
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- if:
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not:
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properties:
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compatible:
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contains:
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enum:
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- ti,j7200-cpsw5g-phy-gmii-sel
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then:
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properties:
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ti,qsgmii-main-ports: false
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- if:
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properties:
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compatible:
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