mirror of
https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git
synced 2024-09-29 05:44:11 +00:00
coresight: tmc-etf: Add comment for store ordering
Since the function CS_LOCK() has contained memory barrier mb(), it ensures the visibility of the AUX trace data before updating the aux_head, thus it's needless to add any explicit barrier anymore. Add comment to make clear for the barrier usage for ETF. Signed-off-by: Leo Yan <leo.yan@linaro.org> Link: https://lore.kernel.org/r/20210809111407.596077-4-leo.yan@linaro.org Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
This commit is contained in:
parent
26701ceb4c
commit
bd8d06886d
1 changed files with 5 additions and 0 deletions
|
@ -553,6 +553,11 @@ static unsigned long tmc_update_etf_buffer(struct coresight_device *csdev,
|
|||
if (buf->snapshot)
|
||||
handle->head += to_read;
|
||||
|
||||
/*
|
||||
* CS_LOCK() contains mb() so it can ensure visibility of the AUX trace
|
||||
* data before the aux_head is updated via perf_aux_output_end(), which
|
||||
* is expected by the perf ring buffer.
|
||||
*/
|
||||
CS_LOCK(drvdata->base);
|
||||
out:
|
||||
spin_unlock_irqrestore(&drvdata->spinlock, flags);
|
||||
|
|
Loading…
Reference in a new issue