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clk: vt8500: Missing breaks in vtwm_pll_round_rate/_set_rate. 

The case of PLL_TYPE_WM8750 in both these functions is missing a break
statement causing a fall-through to the default: case.

Insert the missing break statements.

Signed-off-by: Tony Prisk <linux@prisktech.co.nz>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
This commit is contained in:
Tony Prisk 2013-04-14 17:28:35 +12:00 committed by Mike Turquette
parent 38e4aa0097
commit bdca21ecc2
1 changed files with 2 additions and 0 deletions
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2
drivers/clk/clk-vt8500.c
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@ -488,6 +488,7 @@ static int vtwm_pll_set_rate(struct clk_hw *hw, unsigned long rate,
case PLL_TYPE_WM8750:
wm8750_find_pll_bits(rate, parent_rate, &filter, &mul, &div1, &div2);
pll_val = WM8750_BITS_TO_VAL(filter, mul, div1, div2);
break;
default:
pr_err("%s: invalid pll type\n", __func__);
return 0;
@ -523,6 +524,7 @@ static long vtwm_pll_round_rate(struct clk_hw *hw, unsigned long rate,
case PLL_TYPE_WM8750:
wm8750_find_pll_bits(rate, *prate, &filter, &mul, &div1, &div2);
round_rate = WM8750_BITS_TO_FREQ(*prate, mul, div1, div2);
break;
default:
round_rate = 0;
}