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arm64: dts: clearfog-gt-8k: fix SGMII PHY reset signal

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The PHY reset signal goes to mpp43 on CP0.

Fixes: babc5544c2 ("arm64: dts: clearfog-gt-8k: 1G eth PHY reset signal")
Reported-by: Denis Odintsov <oversun@me.com>
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
This commit is contained in:
Baruch Siach 2019-02-17 20:21:40 +02:00 committed by Gregory CLEMENT
parent 6fc979179c
commit bdd22a41d5
1 changed files with 1 additions and 1 deletions
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2
arch/arm64/boot/dts/marvell/armada-8040-clearfog-gt-8k.dts
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@ -351,7 +351,7 @@ ge_phy: ethernet-phy@0 {
reg = <0>;
pinctrl-names = "default";
pinctrl-0 = <&cp0_copper_eth_phy_reset>;
reset-gpios = <&cp1_gpio1 11 GPIO_ACTIVE_LOW>;
reset-gpios = <&cp0_gpio2 11 GPIO_ACTIVE_LOW>;
reset-assert-us = <10000>;
};