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Blackfin arch: Do not pollute name space used in linux-2.6.x/sound
Signed-off-by: Michael Hennerich <michael.hennerich@analog.com> Signed-off-by: Bryan Wu <bryan.wu@analog.com>
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1 changed files with 43 additions and 43 deletions
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@ -1718,55 +1718,55 @@
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/* Bit masks for HOST_CONTROL */
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/* Bit masks for HOST_CONTROL */
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#define HOST_EN 0x1 /* Host Enable */
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#define HOST_CNTR_HOST_EN 0x1 /* Host Enable */
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#define nHOST_EN 0x0
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#define HOST_CNTR_nHOST_EN 0x0
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#define HOST_END 0x2 /* Host Endianess */
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#define HOST_CNTR_HOST_END 0x2 /* Host Endianess */
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#define nHOST_END 0x0
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#define HOST_CNTR_nHOST_END 0x0
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#define DATA_SIZE 0x4 /* Data Size */
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#define HOST_CNTR_DATA_SIZE 0x4 /* Data Size */
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#define nDATA_SIZE 0x0
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#define HOST_CNTR_nDATA_SIZE 0x0
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#define HOST_RST 0x8 /* Host Reset */
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#define HOST_CNTR_HOST_RST 0x8 /* Host Reset */
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#define nHOST_RST 0x0
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#define HOST_CNTR_nHOST_RST 0x0
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#define HRDY_OVR 0x20 /* Host Ready Override */
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#define HOST_CNTR_HRDY_OVR 0x20 /* Host Ready Override */
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#define nHRDY_OVR 0x0
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#define HOST_CNTR_nHRDY_OVR 0x0
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#define INT_MODE 0x40 /* Interrupt Mode */
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#define HOST_CNTR_INT_MODE 0x40 /* Interrupt Mode */
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#define nINT_MODE 0x0
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#define HOST_CNTR_nINT_MODE 0x0
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#define BT_EN 0x80 /* Bus Timeout Enable */
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#define HOST_CNTR_BT_EN 0x80 /* Bus Timeout Enable */
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#define nBT_EN 0x0
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#define HOST_CNTR_ nBT_EN 0x0
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#define EHW 0x100 /* Enable Host Write */
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#define HOST_CNTR_EHW 0x100 /* Enable Host Write */
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#define nEHW 0x0
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#define HOST_CNTR_nEHW 0x0
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#define EHR 0x200 /* Enable Host Read */
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#define HOST_CNTR_EHR 0x200 /* Enable Host Read */
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#define nEHR 0x0
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#define HOST_CNTR_nEHR 0x0
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#define BDR 0x400 /* Burst DMA Requests */
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#define HOST_CNTR_BDR 0x400 /* Burst DMA Requests */
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#define nBDR 0x0
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#define HOST_CNTR_nBDR 0x0
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/* Bit masks for HOST_STATUS */
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/* Bit masks for HOST_STATUS */
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#define READY 0x1 /* DMA Ready */
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#define HOST_STAT_READY 0x1 /* DMA Ready */
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#define nREADY 0x0
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#define HOST_STAT_nREADY 0x0
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#define FIFOFULL 0x2 /* FIFO Full */
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#define HOST_STAT_FIFOFULL 0x2 /* FIFO Full */
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#define nFIFOFULL 0x0
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#define HOST_STAT_nFIFOFULL 0x0
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#define FIFOEMPTY 0x4 /* FIFO Empty */
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#define HOST_STAT_FIFOEMPTY 0x4 /* FIFO Empty */
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#define nFIFOEMPTY 0x0
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#define HOST_STAT_nFIFOEMPTY 0x0
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#define COMPLETE 0x8 /* DMA Complete */
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#define HOST_STAT_COMPLETE 0x8 /* DMA Complete */
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#define nCOMPLETE 0x0
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#define HOST_STAT_nCOMPLETE 0x0
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#define HSHK 0x10 /* Host Handshake */
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#define HOST_STAT_HSHK 0x10 /* Host Handshake */
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#define nHSHK 0x0
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#define HOST_STAT_nHSHK 0x0
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#define TIMEOUT 0x20 /* Host Timeout */
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#define HOST_STAT_TIMEOUT 0x20 /* Host Timeout */
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#define nTIMEOUT 0x0
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#define HOST_STAT_nTIMEOUT 0x0
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#define HIRQ 0x40 /* Host Interrupt Request */
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#define HOST_STAT_HIRQ 0x40 /* Host Interrupt Request */
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#define nHIRQ 0x0
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#define HOST_STAT_nHIRQ 0x0
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#define ALLOW_CNFG 0x80 /* Allow New Configuration */
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#define HOST_STAT_ALLOW_CNFG 0x80 /* Allow New Configuration */
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#define nALLOW_CNFG 0x0
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#define HOST_STAT_nALLOW_CNFG 0x0
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#define DMA_DIR 0x100 /* DMA Direction */
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#define HOST_STAT_DMA_DIR 0x100 /* DMA Direction */
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#define nDMA_DIR 0x0
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#define HOST_STAT_nDMA_DIR 0x0
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#define BTE 0x200 /* Bus Timeout Enabled */
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#define HOST_STAT_BTE 0x200 /* Bus Timeout Enabled */
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#define nBTE 0x0
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#define HOST_STAT_nBTE 0x0
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#define HOSTRD_DONE 0x8000 /* Host Read Completion Interrupt */
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#define HOST_STAT_HOSTRD_DONE 0x8000 /* Host Read Completion Interrupt */
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#define nHOSTRD_DONE 0x0
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#define HOST_STAT_nHOSTRD_DONE 0x0
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/* Bit masks for HOST_TIMEOUT */
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/* Bit masks for HOST_TIMEOUT */
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#define COUNT_TIMEOUT 0x7ff /* Host Timeout count */
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#define HOST_COUNT_TIMEOUT 0x7ff /* Host Timeout count */
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/* Bit masks for CNT_CONFIG */
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/* Bit masks for CNT_CONFIG */
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