mirror of
https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git
synced 2024-09-30 14:19:16 +00:00
FPGA Manager changes for 6.5-rc1
DFL: - Krzysztof's change constifies pointers to hwmon_channel_info Xilinx: - Alfonso's change ensures proper reprograming (xCAP) interface switch All patches have been reviewed on the mailing list, and have been in the last linux-next releases (as part of our for-next branch). Signed-off-by: Xu Yilun <yilun.xu@intel.com> -----BEGIN PGP SIGNATURE----- iIkEABYIADEWIQSgSJpClIeaArXyudb8twOBpKCM2gUCZIdJSRMceWlsdW4ueHVA aW50ZWwuY29tAAoJEPy3A4GkoIzaBswA/A+f5Z/kkZ+KD+kL4ysOb/pGwWno3lSm AdFxwWv9cfgcAP0UWKNoYxgequpei/wQOp48r3IxSPXureQxxXs92uCeDA== =dLy3 -----END PGP SIGNATURE----- Merge tag 'fpga-for-6.5-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/fpga/linux-fpga into char-misc-next Xu writes: FPGA Manager changes for 6.5-rc1 DFL: - Krzysztof's change constifies pointers to hwmon_channel_info Xilinx: - Alfonso's change ensures proper reprograming (xCAP) interface switch All patches have been reviewed on the mailing list, and have been in the last linux-next releases (as part of our for-next branch). Signed-off-by: Xu Yilun <yilun.xu@intel.com> * tag 'fpga-for-6.5-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/fpga/linux-fpga: fpga: zynq-fpga: Ensure proper xCAP interface switch fpga: dfl-fme: constify pointers to hwmon_channel_info
This commit is contained in:
commit
be2c2edf5b
2 changed files with 6 additions and 6 deletions
|
@ -265,7 +265,7 @@ static const struct hwmon_ops thermal_hwmon_ops = {
|
||||||
.read = thermal_hwmon_read,
|
.read = thermal_hwmon_read,
|
||||||
};
|
};
|
||||||
|
|
||||||
static const struct hwmon_channel_info *thermal_hwmon_info[] = {
|
static const struct hwmon_channel_info * const thermal_hwmon_info[] = {
|
||||||
HWMON_CHANNEL_INFO(temp, HWMON_T_INPUT | HWMON_T_EMERGENCY |
|
HWMON_CHANNEL_INFO(temp, HWMON_T_INPUT | HWMON_T_EMERGENCY |
|
||||||
HWMON_T_MAX | HWMON_T_MAX_ALARM |
|
HWMON_T_MAX | HWMON_T_MAX_ALARM |
|
||||||
HWMON_T_CRIT | HWMON_T_CRIT_ALARM),
|
HWMON_T_CRIT | HWMON_T_CRIT_ALARM),
|
||||||
|
@ -465,7 +465,7 @@ static const struct hwmon_ops power_hwmon_ops = {
|
||||||
.write = power_hwmon_write,
|
.write = power_hwmon_write,
|
||||||
};
|
};
|
||||||
|
|
||||||
static const struct hwmon_channel_info *power_hwmon_info[] = {
|
static const struct hwmon_channel_info * const power_hwmon_info[] = {
|
||||||
HWMON_CHANNEL_INFO(power, HWMON_P_INPUT |
|
HWMON_CHANNEL_INFO(power, HWMON_P_INPUT |
|
||||||
HWMON_P_MAX | HWMON_P_MAX_ALARM |
|
HWMON_P_MAX | HWMON_P_MAX_ALARM |
|
||||||
HWMON_P_CRIT | HWMON_P_CRIT_ALARM),
|
HWMON_P_CRIT | HWMON_P_CRIT_ALARM),
|
||||||
|
|
|
@ -493,15 +493,15 @@ static int zynq_fpga_ops_write_complete(struct fpga_manager *mgr,
|
||||||
if (err)
|
if (err)
|
||||||
return err;
|
return err;
|
||||||
|
|
||||||
/* Release 'PR' control back to the ICAP */
|
|
||||||
zynq_fpga_write(priv, CTRL_OFFSET,
|
|
||||||
zynq_fpga_read(priv, CTRL_OFFSET) & ~CTRL_PCAP_PR_MASK);
|
|
||||||
|
|
||||||
err = zynq_fpga_poll_timeout(priv, INT_STS_OFFSET, intr_status,
|
err = zynq_fpga_poll_timeout(priv, INT_STS_OFFSET, intr_status,
|
||||||
intr_status & IXR_PCFG_DONE_MASK,
|
intr_status & IXR_PCFG_DONE_MASK,
|
||||||
INIT_POLL_DELAY,
|
INIT_POLL_DELAY,
|
||||||
INIT_POLL_TIMEOUT);
|
INIT_POLL_TIMEOUT);
|
||||||
|
|
||||||
|
/* Release 'PR' control back to the ICAP */
|
||||||
|
zynq_fpga_write(priv, CTRL_OFFSET,
|
||||||
|
zynq_fpga_read(priv, CTRL_OFFSET) & ~CTRL_PCAP_PR_MASK);
|
||||||
|
|
||||||
clk_disable(priv->clk);
|
clk_disable(priv->clk);
|
||||||
|
|
||||||
if (err)
|
if (err)
|
||||||
|
|
Loading…
Reference in a new issue